公开(公告)号：MY133800A

公开(公告)日：2007-11-30

申请号：MYPI20011502

申请日：2001-03-29

Applicant: IBM

Inventor： DOUGLAS D COOLBAUGH ,  JAMES STUART DUNN ,  STEPHEN ARTHUR ST ONGE

IPC: H01L27/04 ,  H01L27/108 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/92 ,  H01L29/94

Abstract: A STACKED POLY-POLY/MOS CAPACITOR USEFUL AS A COMPONENT IN A BICMOS DEVICE COMPRISING A SEMICONDUCTOR SUBSTRATE HAVING A REGION OF A FIRST CONDUCTIVITY-TYPE FORMED IN A SURFACE THEREOF; A GAT E OXIDE FORMED ON SAID SEMICONDUCTOR SUBSTRATE OVERLYING SAID REGION OF FIRST CONDUCTIVITYTYPE; A FIRST POLYSILICON LAYER FORMED ON AT LEAST SAID GATE OXIDE LAYER, SAID FIRST POLYSILICON LAYER BEING DOPED WITH AN N OR P-TYPE DOPANT; A DIELECTRIC LAYER FORMED ON SAID FIRST POLYSILICON LAYER; AND A SECOND POLYSILICON LAYER FORMED ON SAID DIELECTRIC LAYER ; SAID SECOND POLYSILICON LAYER BEING DOPED WITH THE SAME OR DIFFERENT DOPANT AS THE FIRST POLYSILICON LAYER.@@FIGURE 4

公开(公告)号：SG107561A1

公开(公告)日：2004-12-29

申请号：SG200101931

申请日：2001-03-26

Applicant: IBM

Inventor： DOUGLAS DUANE COOLBAUGH ,  JAMES STUART DUNN ,  STEPHEN ARTHUR ST ONGE

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/94

Abstract: A stacked Poly-Poly/MOS capacitor useful as a component in a BiCMOS device comprising a semiconductor substrate having a region of a first conductivity-type formed in a surface thereof; a gate oxide formed on said semiconductor substrate overlaying said region of first conductivity-type; a first polysilicon layer formed on at least said gate oxide layer, said first polysilicon layer being doped with an N or P-type dopant; a dielectric layer formed on said first polysilicon layer; and a second polysilicon layer formed on said dielectric layer, said second polysilicon layer being doped with the same or different dopant as the first polysilicon layer.

公开(公告)号：SG96266A1

公开(公告)日：2003-05-23

申请号：SG200107801

申请日：2001-12-13

Applicant: IBM

Inventor： DOUGLAS DUANE COOLBAUGH ,  JAMES STUART DUNN ,  STEPHEN ARTHUR ST ONGE

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L21/8228

Abstract: A method is provided for fabricating a poly-poly capacitor integrated with a BiCMOS process. This includes forming a lower plate electrode of a poly-poly capacitor during deposition of a gate electrode of a CMOS transistor. An upper SiGe plate electrode is then formed during growth of a SiGe base region of a heterojunction bipolar transistor.