公开(公告)号：WO2010055007A3

公开(公告)日：2010-12-09

申请号：PCT/EP2009064818

申请日：2009-11-09

Applicant: IBM ,  IBM UK ,  CASES MOSIES ,  MUTNURY BHYRAV ,  PAGAN WILLIAM

Inventor： CASES MOSIES ,  MUTNURY BHYRAV ,  PAGAN WILLIAM

IPC: G06F1/32 ,  G06F3/14

CPC classification number: G06F3/14 ,  G06F1/3218 ,  G09G2330/02

Abstract: Dynamically managing power consumption of a computer, the computer including two or more graphics adapters, the computer having a number of graphics adapter configurations including one or more of the graphics adapters, where managing power consumption includes: monitoring, by a graphics driver, operation of a current graphics adapter configuration, the operation characterized by a graphics processing load; determining, in dependence upon the graphics processing load, whether operation of the current graphics adapter configuration conforms to predefined graphics processing criteria; if operation conforms, processing graphics, by the graphics adapter, for display with the one or more graphics adapters of the current graphics adapter configuration; and if operation does not conform, processing graphics, by the graphics adapter, for display with the one or more graphics adapters of another graphics adapter configuration.

Abstract translation: 动态管理计算机的功耗，所述计算机包括两个或更多个图形适配器，所述计算机具有包括一个或多个图形适配器的多个图形适配器配置，其中管理功耗包括：由图形驱动器监视 当前图形适配器配置，所述操作以图形处理负载为特征; 根据图形处理负载确定当前图形适配器配置的操作是否符合预定图形处理标准; 如果操作符合，则由图形适配器处理图形，以与当前图形适配器配置的一个或多个图形适配器一起显示; 并且如果操作不一致，则由图形适配器处理图形以与另一图形适配器配置的一个或多个图形适配器一起显示。

公开(公告)号：AT492886T

公开(公告)日：2011-01-15

申请号：AT08775264

申请日：2008-07-21

Applicant: IBM

Inventor： CASES MOISES ,  PHAM NAM ,  ARAUJO DANIEL ,  MUTNURY BHYRAV ,  DREPS DANIEL

IPC: G11C29/56 ,  G06F11/273

Abstract: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.