-
公开(公告)号:JP2003195828A
公开(公告)日:2003-07-09
申请号:JP2001395280
申请日:2001-12-26
Applicant: IBM
Inventor: OGAWA HIDEKI , SAKAETANI TETSUYA , KATAOKA RIEKO , KOBAYASHI MASAKI
Abstract: PROBLEM TO BE SOLVED: To provide a display device and information processor which enable a user to properly set easiness of viewing a screen and a trade-off for lower power consumption. SOLUTION: The display device 200 equipped with a panel 230 where pixels are arrayed in matrix comprises a mode setting part 240 for setting one of a plurality of display modes of the display device 200, a voltage supply part 250 which varies a driving voltage as a reference voltage for a voltage to be supplied to the panel 230 according to the display mode set by the mode setting part 240, a gate driver 260 which supplies a selection signal to a plurality of pixels arrayed in a column direction on the panel 230, and a source driver 270 which supplies a pixel driving voltage generated based on luminance data specifying the luminance of a plurality of pixels selected by the selection signal and the driving voltage to the plurality of selected pixels. COPYRIGHT: (C)2003,JPO
-
公开(公告)号:JPH10333642A
公开(公告)日:1998-12-18
申请号:JP13680197
申请日:1997-05-27
Applicant: IBM
Inventor: SAKAETANI TETSUYA , AMAMIYA TAKAHISA , SUZUKI MIDORI
Abstract: PROBLEM TO BE SOLVED: To erase an after-image arising in cutting off a system power supply with an inexpensive circuit construction without securing a special power supply. SOLUTION: The liquid crystal display device has a gate line 32 connected to a gate for a transistor 31a in an active switch element, a node A to supply gate low voltage Vgl thereto, a P channel transistor 37 connected between the node A and a charge accumulating means 36, a node C connected to its gate, a voltage supply means 38 to supply voltage to the node C for keeping the P channel transistor in a highly resistant condition while power voltage Vdd is supplied to the liquid crystal display device, a voltage dropping means 39 to set the node C to such voltage that the P channel transistor is in a low resistant condition with capacity coupling, depending on the change of the power voltage Vdd, when there is no voltage supply, a control means 33 to supply charge from the charge accumulating means through the node A to the gate line for making the transistor 31a in a low resistant state.
-