IMPROVING DES HARDWARE THROUGHPUT FOR SHORT OPERATIONS
    1.
    发明公开
    IMPROVING DES HARDWARE THROUGHPUT FOR SHORT OPERATIONS 有权
    改善硬件于短操作FLOW

    公开(公告)号:EP1297652A4

    公开(公告)日:2003-08-20

    申请号:EP01932776

    申请日:2001-04-30

    Applicant: IBM

    CPC classification number: H04L9/0625 G09C1/00 H04L2209/12

    Abstract: A symmetric key cryptographic method is provided for short operations. The method includes batching a plurality of operation parameters (1503), and performing an operation according to a corresponding operation parameter (1505). The symmetric key cryptographic method is a Data Encryption Standard (DES) method. The short operations can be less than about 80 bytes. The short operations can be between 8 and 80 bytes. The method includes reading the batched parameters from a dynamic random access memory (1504), and transmitting each operation through a DES engine according to the operations parameter (1505).

    SYSTEM AND METHOD FOR ISSUING ELECTRONIC COUPON

    公开(公告)号:JP2000067312A

    公开(公告)日:2000-03-03

    申请号:JP9460299

    申请日:1999-04-01

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To guarantee that each consumer reads the advertisement of a product by transferring an electronic coupon to a smart card through a smart card reader/writer by a software program when the software program detects a previously defined situation. SOLUTION: The certified electronic coupon issuing system is constituted of a computer 110 for executing issue software 115, an advertisement display computer 120 for executing advertisement display software 123 for transmitting a request to a coupon to the computer 110, a digitally signed electronic coupon 150, a payment smark card reader/writer 160 and a customer's smart card 170, etc. The software 115 extracts a customer's interesting profile or the like from a request, selects an electronic advertisement coincident with the profile or the like and prepares a digitally signed electronic coupon. A receiver can verifies the digital signature by using a transmitter's disclosed key and message.

    4.
    发明专利
    未知

    公开(公告)号:DE69903805D1

    公开(公告)日:2002-12-12

    申请号:DE69903805

    申请日:1999-03-05

    Applicant: IBM IBM UK

    Abstract: A system collects information associated with movement between locations. The system includes individual cards. Each individual card has a storage area and an interactor for receiving promotional unit data. A plurality of promotional units are also included. Each promotional unit transmits respective promotional unit data to any card with which it interacts. The promotional unit data within each card may then be downloaded to determine with which promotional units interaction has occurred.

    5.
    发明专利
    未知

    公开(公告)号:AT318032T

    公开(公告)日:2006-03-15

    申请号:AT01932776

    申请日:2001-04-30

    Applicant: IBM

    Abstract: A system for executing a symmetric key cryptographic method includes a processor selecting data paths, a key, an initialization vector, a memory storing batched operation parameters, a bus connected to the processor and the memory, a cryptographic processor connected to the bus and controlled by the processor for performing a plurality of operations according to the operations parameter, wherein data for each operation is received individually and separately from the batched operation parameters, wherein an output for each operation is transmitted separately, and a pair of first-in-first-out (FIFO) state machines controlled by the processor and selectably connected to one of the cryptographic processor and the bus, bypassing the cryptographic processor.

    Improving des hardware throughput for short operations

    公开(公告)号:AU5927701A

    公开(公告)日:2001-11-12

    申请号:AU5927701

    申请日:2001-04-30

    Applicant: IBM

    Abstract: A system for executing a symmetric key cryptographic method includes a processor selecting data paths, a key, an initialization vector, a memory storing batched operation parameters, a bus connected to the processor and the memory, a cryptographic processor connected to the bus and controlled by the processor for performing a plurality of operations according to the operations parameter, wherein data for each operation is received individually and separately from the batched operation parameters, wherein an output for each operation is transmitted separately, and a pair of first-in-first-out (FIFO) state machines controlled by the processor and selectably connected to one of the cryptographic processor and the bus, bypassing the cryptographic processor.

Patent Agency Ranking