公开(公告)号：GB1293442A

公开(公告)日：1972-10-18

申请号：GB1870970

申请日：1970-04-20

Applicant: IBM

Inventor： SCHUENEMANN CLAUS HEINRICH ,  SPRUTH WILHELM GUSTAV

IPC: G06F1/03 ,  G06F7/50 ,  G06F7/505 ,  G06F7/575 ,  G06F9/22 ,  G06F9/26 ,  G06F13/12 ,  G06F15/78

Abstract: 1293442 Data processing INTERNATIONAL BUSINESS MACHINES CORP 20 April 1970 [2 May 1969] 18709/70 Addition to 1218407 Heading G4A An electronic data processing system, wherein logic and arithmetic functions are performed by table-look-up operations on stored function tables, comprises at least one read-only function store containing function tables, at least one work store arranged in operation to store operands, and a microprogramme store arranged in operation to emit microinstructions each including an operation code, each function and microprogramme store comprising a read-only store and having a respective decoder arranged to decode a part of the operation code particular to the store. In the CPU, address, data and control buses interconnect two work stores, a main store, the microprogramme read-only store and a branch read-only store for it, and readonly function stores (for binary addition, shift, ORing, EXCL-ORing, and inversion). Arrays of read-only function stores feeding each other are disclosed. The branch store evaluates (b#c)#a, and uses it as part of the next microinstruction address, the rest coming from the current microinstruction. Here a, b, c are 4-bits each, and come from the current microinstruction, the address bus and the data bus respectively. Address, data and control buses interconnect the CPU with I/O controllers each of which has two work stores, arithmetic and logic arrangements and a function control, similarly to the CPU. Requests for access to the buses from the CPU and I/O controllers, if concurrent, are resolved using a priority table in a readonly store. The CPU and I/O controllers communicate with each other via respective reserved areas in main store. Error correction Hamming code generators (using tables in read-only stores) are provided for the inputs and outputs of the CPU work stores. Multiplication is by examining the multiplier bits in turn using a mask, a 1 bit causing the multiplicand to be added into a result field, and in either case the multiplicand and multiplier then being shifted one place left and right respectively.