公开(公告)号：DE3586553D1

公开(公告)日：1992-10-01

申请号：DE3586553

申请日：1985-06-13

Applicant: IBM

Inventor： AKAI TAKAYUKI ,  YAMAGUCHI JUNICHI

IPC: G06F12/02 ,  G06T3/00 ,  G06T3/60 ,  G06F15/62

Abstract: The invention relates to an image processing apparatus in which an image stored in a source area in an image memory area is processed and stored in a destination area in the image memory area. The apparatus determine as to whether the destination area overlaps on the source area to generate a first response signal indicating the occurrence of the overlap or a second response signal indicating the non-occurrence of the overlap. If non-occurrence, the image in the source area is processed as a single image block. If the destination area overlaps on the source area, the image in the source area is divided into plural sub-image blocks and priority is assigned to the sub-image blocks. Then, the sub-image blocks are processed in accordance with the priority.

公开(公告)号：DE3586553T2

公开(公告)日：1993-06-03

申请号：DE3586553

申请日：1985-06-13

Applicant: IBM

Inventor： AKAI TAKAYUKI ,  YAMAGUCHI JUNICHI

IPC: G06F12/02 ,  G06T3/00 ,  G06T3/60 ,  G06F15/62

Abstract: The invention relates to an image processing apparatus in which an image stored in a source area in an image memory area is processed and stored in a destination area in the image memory area. The apparatus determine as to whether the destination area overlaps on the source area to generate a first response signal indicating the occurrence of the overlap or a second response signal indicating the non-occurrence of the overlap. If non-occurrence, the image in the source area is processed as a single image block. If the destination area overlaps on the source area, the image in the source area is divided into plural sub-image blocks and priority is assigned to the sub-image blocks. Then, the sub-image blocks are processed in accordance with the priority.

公开(公告)号：CA1238725A

公开(公告)日：1988-06-28

申请号：CA478892

申请日：1985-04-11

Applicant: IBM

Inventor： AKAI TAKAYUKI ,  YAMAGUCHI JUNICHI

IPC: G06F12/02 ,  G06T3/00 ,  G06T3/60 ,  G09G3/00

Abstract: IMAGE PROCESSING APPARATUS JA9-84-012 The disclosure describes an image processing apparatus in which an image stored in a source area in an image memory area is processed and stored in a destination area in the image memory area. The apparatus determines whether the destination area overlaps on the source area to generate a first response signal indicating the occurrence of the overlap, or a second response signal indicating the non-occurrence of the overlap. If non-occurrence, the image in the source area is processed as a single image block. If the destination area overlaps on the source area, the image in the source area is divided into plural sub-image blocks and priority is assigned to the sub-image blocks. Then, the sub-image blocks are processed in accordance with the priority.