公开(公告)号：US20240222288A1

公开(公告)日：2024-07-04

申请号：US18090140

申请日：2022-12-28

Applicant: Intel Corporation

Inventor： David Shia ,  Timothy Gosselin ,  Aravindha Antoniswamy ,  Sergio Antonio Chan Arguedas ,  Elah Bozorg-Grayeli ,  Johnny Cook, JR. ,  Steven Klein ,  Rick Canham

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/427 ,  H01L23/49

CPC classification number: H01L23/544 ,  H01L23/427 ,  H01L23/49 ,  H01L24/08 ,  H01L24/48 ,  H01L2224/08113 ,  H01L2224/48229 ,  H01L2924/15165 ,  H01L2924/1711 ,  H01L2924/173 ,  H01L2924/17724 ,  H01L2924/1776

Abstract: Integrated circuit (IC) device substrates and structures for mating and aligning with sockets. An IC device may include a frame on and around a substrate, which may include glass or silicon. The frame may include an alignment feature, such as a notch or hole, to mate with a complementary keying feature of a socket. A heat spreader may be coupled to an IC die and extend beyond the substrate or be coupled to the frame. The heat spreader may include a heat pipe. The IC device may be part of an IC system with the device substrate coupled to a system substrate by a socket configured to mate to the frame.

公开(公告)号：US20220165625A1

公开(公告)日：2022-05-26

申请号：US17100449

申请日：2020-11-20

Applicant: Intel Corporation

Inventor： Xavier Brun ,  Timothy Gosselin

IPC: H01L21/84 ,  H01L21/762 ,  H01L21/768

Abstract: An integrated circuit package may be fabricated with a universal dummy device, instead of utilizing a dummy device that matches the bump layer of an electronic substrate of the integrated circuit package. In one embodiment, the universal dummy device may comprise a device substrate having an attachment surface and a metallization layer on the attachment surface, wherein the metallization layer is utilized to form a connection with the electronic substrate of the integrated circuit package. In a specific embodiment, the metallization layer may be a single structure extending across the entire attachment surface. In another embodiment, the metallization layer may be patterned to enable gap control between the universal dummy device and the electronic substrate.

公开(公告)号：US20240395567A1

公开(公告)日：2024-11-28

申请号：US18323521

申请日：2023-05-25

Applicant: Intel Corporation

Inventor： Jonas G. Croissant ,  Yiqun Bai ,  Dingying Xu ,  Xavier F. Brun ,  Timothy Gosselin ,  Ye Seul Nam ,  Gustavo Arturo Beltran ,  Roberto Serna ,  Jesus S. Nieto Pescador ,  Aris Mercado Orbase

IPC: H01L21/56 ,  G02B6/122 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

Abstract: Integrated circuit (IC) packages with pre-applied underfill in select areas, and methods of forming the same, are disclosed herein. In one example, an IC package includes a package substrate, a first IC die electrically coupled to the package substrate, a second IC die electrically coupled to the first IC die, and a thermoset adhesive that partially fills an area between the first IC die and the second IC die.