Abstract:
An array guide for a probe pin for testing an LCD panel and a method for manufacturing the same are provided to inspect a pixel fault precisely corresponds to the probe pin with the pixel of the LCD panel. A pad(100) is plated with a conductive film(110) at one side, and formed in the nonconducting substance. A lower slit(200) coats the parylene in order to reduce impact with the probe pin and forms the protective film. A supporter(300) of the nonconducting substance is positioned in one side of the top side of the low slit without the interference with etching hole. An upper slit(400) is formed on the supporter and arranged along the etching hole of the lower slit. The upper slit includes a protective layer by coating parylene to reduce the impact with the probe pin.
Abstract:
A manufacturing method of an AFM(Atomic Force Microscopy) cantilever having a FET(Field Effect Transistor) is provided to easily perform simulation for manufacturing the AFM cantilever having the FET by finely controlling length of an effective channel, and to improve yield of a manufacturing process by using low cost photolithography equipment. A manufacturing method of an AFM cantilever having a FET comprises the steps of forming multilayer insulating film in an upper part of a substrate formed sequentially in an order of a first semiconductor substrate, interlayer insulating film and a second semiconductor substrate, sequentially etching the multilayer insulating film, injecting ions having different type from the second semiconductor substrate and forming a source/drain and a channel, etching the second semiconductor substrate and forming a probe(220) and a probe portion(210), forming the insulating film in a region except the probe and the probe portion, and forming a metal electrode in an upper part of a region of the source/drain and the channel, sequentially etching the multilayer insulating film, the second semiconductor substrate, the insulating film and the first semiconductor substrate, and forming a cantilever portion(230), and etching a rear surface of the first semiconductor substrate and forming a handling portion(240).