AFM CANTILEVER HAVING FET AND METHOD FOR MANUFACTURING THE SAME
    1.
    发明授权
    AFM CANTILEVER HAVING FET AND METHOD FOR MANUFACTURING THE SAME 无效
    具有FET的AFM插座及其制造方法

    公开(公告)号:KR100771851B1

    公开(公告)日:2007-10-31

    申请号:KR20060068546

    申请日:2006-07-21

    CPC classification number: G01Q60/30 G01Q60/38

    Abstract: A manufacturing method of an AFM(Atomic Force Microscopy) cantilever having a FET(Field Effect Transistor) is provided to easily perform simulation for manufacturing the AFM cantilever having the FET by finely controlling length of an effective channel, and to improve yield of a manufacturing process by using low cost photolithography equipment. A manufacturing method of an AFM cantilever having a FET comprises the steps of forming multilayer insulating film in an upper part of a substrate formed sequentially in an order of a first semiconductor substrate, interlayer insulating film and a second semiconductor substrate, sequentially etching the multilayer insulating film, injecting ions having different type from the second semiconductor substrate and forming a source/drain and a channel, etching the second semiconductor substrate and forming a probe(220) and a probe portion(210), forming the insulating film in a region except the probe and the probe portion, and forming a metal electrode in an upper part of a region of the source/drain and the channel, sequentially etching the multilayer insulating film, the second semiconductor substrate, the insulating film and the first semiconductor substrate, and forming a cantilever portion(230), and etching a rear surface of the first semiconductor substrate and forming a handling portion(240).

    Abstract translation: 提供具有FET(场效应晶体管)的AFM(原子力显微镜)悬臂的制造方法,以通过精细地控制有效通道的长度来容易地进行用于制造具有FET的AFM悬臂的模拟,并且提高制造的产量 通过使用低成本光刻设备进行处理。 具有FET的AFM悬臂的制造方法包括以下步骤:在第一半导体衬底,层间绝缘膜和第二半导体衬底的顺序依次形成的衬底的上部中形成多层绝缘膜,依次蚀刻多层绝缘体 从所述第二半导体衬底注入具有不同类型的离子并形成源极/漏极和沟道,蚀刻所述第二半导体衬底并形成探针(220)和探针部分(210),所述绝缘膜在除了 探针和探针部分,并且在源极/漏极和沟道的区域的上部形成金属电极,依次蚀刻多层绝缘膜,第二半导体衬底,绝缘膜和第一半导体衬底,以及 形成悬臂部分(230),并蚀刻第一半导体衬底的后表面并形成处理口 离子(240)。

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