公开(公告)号：US09520211B2

公开(公告)日：2016-12-13

申请号：US14386863

申请日：2012-12-21

Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCE

Inventor： Woo Lee ,  Hee Han

IPC: H01R43/16 ,  H01B13/00 ,  B82Y10/00 ,  H01L29/06 ,  H01L29/16 ,  H01B1/02 ,  B82Y20/00 ,  B82Y40/00 ,  H01L29/417

CPC classification number: H01B13/0036 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y40/00 ,  H01B1/02 ,  H01L29/0676 ,  H01L29/16 ,  H01L29/417 ,  Y10T29/49117

Abstract: Provided are a method of forming an upper electrode of a nanowire array and a nanowire array having an upper electrode formed thereon. The method includes a step of placing a polymeric thin film layer, a step of pressing, a step of treating a mixed solution, a step of etching, and a step of depositing an electrode material, such that the upper electrode is reliably formed in a state in which the polymeric thin film layer is formed on a portion of the nanowire, thereby making it possible to implement various nano-devices based on the nanowire array aligned on a substrate having a large area.

Abstract translation: 提供一种形成纳米线阵列的上电极和形成有上电极的纳米线阵列的方法。 该方法包括放置聚合物薄膜层，压制步骤，处理混合溶液的步骤，蚀刻步骤和沉积电极材料的步骤，使得上电极可靠地形成在 在纳米线的一部分上形成聚合物薄膜层的状态，从而可以实现基于在具有大面积的基板上排列的纳米线阵列的各种纳米器件。

公开(公告)号：US10147789B2

公开(公告)日：2018-12-04

申请号：US15317922

申请日：2014-06-25

Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCE

Inventor： Woo Lee ,  Jeong Ho Shin

IPC: H01L29/06 ,  H01L21/306 ,  H01L29/20 ,  B82B3/00 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/3063 ,  H01L21/308

Abstract: The present invention relates to a method for manufacturing a GaAs semiconductor nanowire in a bottom-up type and, more particularly, to a method for manufacturing a vertically-aligned gallium arsenide semiconductor nanowire array in a large area by applying a voltage and a current from the outside using a metal thin film, which has been made through an economical method of fabricating a mesh-type metal thin film in a large area, as an anode such that holes (h+) are injected into a gallium arsenide substrate, thereby inducing a wet etching process continuously. The obtained vertically-aligned gallium arsenide semiconductor nanowire of a large area can be applied to fabrication of nanoelements, such as a solar cell, a transistor, and a light-emitting diode.

公开(公告)号：US20150083467A1

公开(公告)日：2015-03-26

申请号：US14386863

申请日：2012-12-21

Applicant: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCE

Inventor： Woo Lee ,  Hee Han

IPC: H01B13/00 ,  H01B1/02

CPC classification number: H01B13/0036 ,  B82Y10/00 ,  B82Y20/00 ,  B82Y40/00 ,  H01B1/02 ,  H01L29/0676 ,  H01L29/16 ,  H01L29/417 ,  Y10T29/49117

Abstract: Provided are a method of forming an upper electrode of a nanowire array and a nanowire array having an upper electrode formed thereon. The method includes a step of placing a polymeric thin film layer, a step of pressing, a step of treating a mixed solution, a step of etching, and a step of depositing an electrode material, such that the upper electrode is reliably formed in a state in which the polymeric thin film layer is formed on a portion of the nanowire, thereby making it possible to implement various nano-devices based on the nanowire array aligned on a substrate having a large area.

Abstract translation: 提供一种形成纳米线阵列的上电极和形成有上电极的纳米线阵列的方法。 该方法包括放置聚合物薄膜层，压制步骤，处理混合溶液的步骤，蚀刻步骤和沉积电极材料的步骤，使得上电极可靠地形成在 在纳米线的一部分上形成聚合物薄膜层的状态，从而可以实现基于在具有大面积的基板上排列的纳米线阵列的各种纳米器件。