公开(公告)号：JP2000124413A

公开(公告)日：2000-04-28

申请号：JP29238699

申请日：1999-10-14

Applicant: ST MICROELECTRONICS SA

Inventor： JEROME SUIAVATI ,  CHRISTIAN BOCCASIO

IPC: H01L27/108 ,  H01L21/8242

Abstract: PROBLEM TO BE SOLVED: To simplify a manufacturing method of a DRAM cell by depositing a third conductive layer on a second insulation film after a second opening is formed. SOLUTION: For example, a DRAM cell is formed in an integrated circuit. While on the one hand a capacitor with an electrode in contact with a first region 2-1 in a substrate 1 is formed, on the other hand a contact with a semiconductor region 2-2 in the substrate 1 is formed. That is, an insulator thickness A between the substrate 1 and a third conductive layer 17 is selected to be between a thickness D1 of a first insulation layer 13-1 and a thickness E1 of a second insulation layer 13-2 and to make an upper surface of a second electrode 16 practically flush with an upper surface of the conductive layer 17. Therefore, a third opening 030 and a fourth opening 040 practically have the same depth and flattening can be simplified by reducing a thickness E1 to minimize height difference of an upper surface of the insulation layer 18 between a part covering a region to establish a contact with the region 2-2 and a part covering a region to establish a contact with a second electrode of a capacitor.