Current modulation circuit
    1.
    发明授权
    Current modulation circuit 有权
    电流调制电路

    公开(公告)号:US09568927B2

    公开(公告)日:2017-02-14

    申请号:US14270677

    申请日:2014-05-06

    CPC classification number: G05F1/561 G05F1/10

    Abstract: A modulated digital input signal is passed through a conditioning circuit to generate a first input signal. An error amplifier circuit receives the first input signal and a second input signal, and controls the operation of a MOS transistor to generate an output signal that is current modulated. The output signal is sensed to generate a feedback signal. A switching circuit selectively applies the feedback signal as the second input signal in response to a transition of the modulated digital input signal from a first logic state to a second logic state. The switching circuit alternatively selectively applies a fixed reference signal as the second input signal to the error amplifier in response to a transition of the modulated digital input signal from the second logic state to the first logic state.

    Abstract translation: 调制数字输入信号通过调理电路以产生第一输入信号。 误差放大器电路接收第一输入信号和第二输入信号,并且控制MOS晶体管的操作以产生电流调制的输出信号。 感测输出信号以产生反馈信号。 响应于调制的数字输入信号从第一逻辑状态到第二逻辑状态的转变,开关电路选择性地将反馈信号作为第二输入信号施加。 响应于调制的数字输入信号从第二逻辑状态到第一逻辑状态的转变,开关电路交替地选择性地将固定参考信号作为第二输入信号施加到误差放大器。

    CURRENT MODULATION CIRCUIT
    2.
    发明申请
    CURRENT MODULATION CIRCUIT 有权
    电流调制电路

    公开(公告)号:US20150323944A1

    公开(公告)日:2015-11-12

    申请号:US14270677

    申请日:2014-05-06

    CPC classification number: G05F1/561 G05F1/10

    Abstract: A modulated digital input signal is passed through a conditioning circuit to generate a first input signal. An error amplifier circuit receives the first input signal and a second input signal, and controls the operation of a MOS transistor to generate an output signal that is current modulated. The output signal is sensed to generate a feedback signal. A switching circuit selectively applies the feedback signal as the second input signal in response to a transition of the modulated digital input signal from a first logic state to a second logic state. The switching circuit alternatively selectively applies a fixed reference signal as the second input signal to the error amplifier in response to a transition of the modulated digital input signal from the second logic state to the first logic state.

    Abstract translation: 调制数字输入信号通过调理电路以产生第一输入信号。 误差放大器电路接收第一输入信号和第二输入信号,并且控制MOS晶体管的操作以产生电流调制的输出信号。 感测输出信号以产生反馈信号。 响应于调制的数字输入信号从第一逻辑状态到第二逻辑状态的转变,开关电路选择性地将反馈信号作为第二输入信号施加。 响应于调制的数字输入信号从第二逻辑状态到第一逻辑状态的转变,开关电路交替地选择性地将固定参考信号作为第二输入信号施加到误差放大器。

    Voltage regulator device
    3.
    发明授权

    公开(公告)号:US12301111B2

    公开(公告)日:2025-05-13

    申请号:US18089736

    申请日:2022-12-28

    Abstract: A supply node receives supply voltage and an output node provides a regulated output voltage to a load. A switching transistor is coupled between the supply and output nodes. The switching transistor is controlled by a drive signal generated by a control circuit to control switching activity. The control circuit includes circuitry to sense a feedback voltage indicative of the regulated output voltage and a comparator generating a comparison logic signal dependent on a comparison of the feedback voltage to a reference. A logic circuit generates a skip signal in response to the comparison logic signal. A counter generates a termination signal. Signal processing circuitry controls the switching activity by asserting the drive signal as a function of the skip signal and the termination signal.

    DISCHARGE CIRCUIT AND METHOD FOR VOLTAGE TRANSITION MANAGEMENT

    公开(公告)号:US20250028342A1

    公开(公告)日:2025-01-23

    申请号:US18907071

    申请日:2024-10-04

    Abstract: In an embodiment, a method includes: providing a voltage setpoint to a voltage converter; generating an output voltage at a voltage rail with the voltage converter based on the voltage setpoint; when the voltage setpoint is transitioning from a first voltage setpoint to a second voltage setpoint that has a lower magnitude than the first voltage setpoint, providing a first constant current to a first node coupled to a control terminal of an output transistor to turn on the output transistor, where the output transistor includes a source terminal coupled to a first terminal of a first resistor, and where a current path of the output transistor is coupled to the voltage rail; and turning off the output transistor after the output voltage reaches the target output voltage corresponding to the second voltage setpoint.

    Discharge circuit and method for voltage transition management

    公开(公告)号:US12135572B2

    公开(公告)日:2024-11-05

    申请号:US17694182

    申请日:2022-03-14

    Abstract: In an embodiment, a method includes: providing a voltage setpoint to a voltage converter; generating an output voltage at a voltage rail with the voltage converter based on the voltage setpoint; when the voltage setpoint is transitioning from a first voltage setpoint to a second voltage setpoint that has a lower magnitude than the first voltage setpoint, providing a first constant current to a first node coupled to a control terminal of an output transistor to turn on the output transistor, where the output transistor includes a source terminal coupled to a first terminal of a first resistor, and where a current path of the output transistor is coupled to the voltage rail; and turning off the output transistor after the output voltage reaches the target output voltage corresponding to the second voltage setpoint.

    Converter circuit, corresponding device and method

    公开(公告)号:US11626799B2

    公开(公告)日:2023-04-11

    申请号:US17393243

    申请日:2021-08-03

    Abstract: A converter circuit includes first and second electronic switches coupled at an intermediate node, with an inductor coupled between the intermediate node and an output node. Switching drive control circuitry causes the first and the second electronic switch to switch between a conductive state and a non-conductive state. The drive control circuitry includes a first feedback signal path to control switching of the first and the second electronic switch as a function of the difference between a feedback signal indicative of the signal at the output node and a reference value. A second feedback signal path includes a low-pass filter coupled to the output node and configured to provide a low-pass filtered feedback signal resulting from low-pass filtering of the output signal. The second feedback signal path compensates the feedback signal as a function of the difference between the low-pass filtered feedback signal and a respective reference value.

    Anti-aging architecture for power MOSFET device

    公开(公告)号:US11094807B2

    公开(公告)日:2021-08-17

    申请号:US16561670

    申请日:2019-09-05

    Abstract: A power MOS stage includes a first power MOS device and a second power MOS devices connected in parallel between a first node and a second node, the first power MOS device having a first voltage rating and the second power MOS device having a second voltage rating that is lower than the first voltage rating. A driver circuit is configured to drive control nodes of the first and second power MOS devices in a sequential manner when actuating the power MOS stage by actuating the first power MOS device before actuating the second power MOS device. The control nodes of the first and second power MOS devices are further driven in a sequential manner when deactuating the power MOS stage by deactuating the second power MOS device before deactuating the first power MOS device.

    System for driving an array of MEMS structures and corresponding driving method

    公开(公告)号:US10118819B2

    公开(公告)日:2018-11-06

    申请号:US15410394

    申请日:2017-01-19

    Abstract: A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.

    ENHANCED-EFFICIENCY ENERGY-SCAVENGING INTERFACE, METHOD FOR OPERATING THE ENERGY-SCAVENGING INTERFACE, AND ENERGY-SCAVENGING SYSTEM COMPRISING THE ENERGY-SCAVENGING INTERFACE
    10.
    发明申请
    ENHANCED-EFFICIENCY ENERGY-SCAVENGING INTERFACE, METHOD FOR OPERATING THE ENERGY-SCAVENGING INTERFACE, AND ENERGY-SCAVENGING SYSTEM COMPRISING THE ENERGY-SCAVENGING INTERFACE 审中-公开
    提高能源消耗接口,操作能量消耗接口的方法,以及包含能量消耗接口的能量扫描系统

    公开(公告)号:US20160344235A1

    公开(公告)日:2016-11-24

    申请号:US15226473

    申请日:2016-08-02

    Abstract: An energy-scavenging interface includes first and second switches connected in series between an input and reference, and third and fourth switches connected in series between the input and an output. A control circuit closes the first and second switches and opens the third switch for a first time interval to store charge in a storage element. A scaled copy of a peak value of the charging current is obtained. The control circuit then opens the first switch and closes the third and fourth switches to generate an output signal as long as the value in current of the output signal is higher than the value of said scaled copy of the peak value.

    Abstract translation: 能量清除界面包括串联连接在输入和参考之间的第一和第二开关以及串联连接在输入和输出之间的第三和第四开关。 控制电路关闭第一和第二开关并打开第一开关第一时间间隔以将电荷存储在存储元件中。 获得充电电流的峰值的缩放副本。 只要输出信号的电流值高于峰值的缩放副本的值,控制电路就打开第一开关并闭合第三和第四开关以产生输出信号。

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