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公开(公告)号：US11469665B2
公开(公告)日：2022-10-11
申请号：US17147123
申请日：2021-01-12
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Bertolini , Alberto Cattani , Alessandro Gasparini
Abstract: A switching converter includes a voltage conversion circuit providing an output voltage from an input voltage and a PWM voltage generated in response to first and second oscillating voltages. The input stage of a transconductor circuit provides an input reference current following a difference between a reference voltage and a voltage dependent on the output voltage and according to a transconductance, and an output stage for providing an output reference current from the input reference current. A phase shifter shifts an oscillating reference voltage according to the output reference current to obtain the first and second oscillating voltages. The transconductance is controlled in response to the input voltage resulting in a change of the input reference current. Compensation for that change is provided by subtracting a variable compensation current from the input reference current, where the variable compensation current is generated in response to the input voltage.
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公开(公告)号：US11057028B2
公开(公告)日：2021-07-06
申请号：US16559118
申请日：2019-09-03
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Bertolini , Alberto Cattani , Stefano Ramorini , Alessandro Gasparini
Abstract: A DC-DC converter includes clock generation circuitry generating first and second clock signals that are out of phase, and a control signal generator generating a switching control signal at an edge of the second clock signal based upon a comparison of an error voltage to a summed voltage. Boost circuitry charges an energy storage component during an on-phase and discharges the energy storage component during an off-phase to thereby generate an output voltage. The on-phase and off-phase are set as a function of the switching control signal. Sum voltage generation circuitry generates a ramp voltage in response to an edge of the first clock signal and generates the summed voltage at an edge of the second clock signal. The sum voltage represents a sum of the ramp voltage and a voltage representative of the current flowing in the energy storage component during the on-phase.
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公开(公告)号：US09680323B2
公开(公告)日：2017-06-13
申请号：US14505029
申请日：2014-10-02
Applicant: STMicroelectronics S.r.l.
Inventor： Stefano Ramorini , Alessandro Gasparini , Alberto Cattani
CPC classification number: H02J7/007 , H02J7/0052 , H02J7/345 , H02J2007/0059 , H02M3/158 , H02M2001/009
Abstract: An energy harvesting circuit receives an input voltage from a transducer and uses a single inductor operating in a DC-DC converter charging mode to generate charging current at a first output coupled to an energy storage device where a supply voltage is stored. The energy harvesting circuit further receives the supply voltage from the energy storage device and uses the same single inductor operating in a DC-DC converter regulating mode to generate load current at a second output where a regulated load voltage is provided. The energy harvesting circuit switches between the charging mode and the regulating mode in accordance with a discontinuous mode (DCM) control process.
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4.发明授权Step counter device with energy-scavenging functionality, and step-counting method 有权具有能量清除功能的步进式装置和步进计数方法公开(公告)号：US09587959B2
公开(公告)日：2017-03-07
申请号：US14034764
申请日：2013-09-24
Applicant: STMicroelectronics S.r.l.
Inventor： Alessandro Gasparini , Stefano Ramorini , Alberto Cattani
CPC classification number: G01C22/006 , A43B3/0015 , H02M7/219
Abstract: A step-counter device detects and counts user steps. The device includes a transducer configured to generate an electrical transduction signal in response to user stepping. An energy-scavenging system is coupled to the transducer to generate a power supply voltage in response to the electrical transduction signal. A processing unit is powered by the power supply voltage. The processing unit is further configured to sense the electrical transduction signal and determine whether a user step has occurred and in response to that determination increment a step counter.
Abstract translation: 步进计数器装置检测和计数用户步骤。 该装置包括被配置为响应于用户步进产生电传导信号的换能器。 能量清除系统耦合到换能器以响应于电传导信号产生电源电压。 处理单元由电源电压供电。 处理单元还被配置为感测电转换信号并且确定用户步骤是否已经发生，并且响应于该确定增量而进行步进计数器。
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5.发明授权High-efficiency energy harvesting interface and corresponding energy harvesting system 有权高效能量采集接口和相应的能量采集系统公开(公告)号：US09564800B2
公开(公告)日：2017-02-07
申请号：US15163394
申请日：2016-05-24
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Stefano Ramorini , Alessandro Gasparini , Alberto Cattani
Abstract: An electrical-energy harvesting system envisages a transducer for converting energy from an environmental energy source into a transduced signal, an electrical energy harvesting interface for receiving the transduced signal and for supplying a harvesting signal, and an energy storage element coupled to the electrical energy harvesting interface for receiving the harvesting signal. The electrical-energy harvesting system also includes a voltage converter connected to the electrical energy harvesting interface for generating a regulated voltage. The harvesting interface samples an open-circuit voltage value of the transduced signal, generates an optimized voltage value starting from the open-circuit voltage value, and generates an upper threshold voltage and a lower threshold voltage on the basis of the optimized voltage value. The harvesting interface controls the voltage converter in switching mode so that the harvesting signal has a value between the upper and lower threshold voltages in at least one operating condition.
Abstract translation: 电能收集系统设想用于将来自环境能源的能量转换成转换信号的换能器，用于接收转换信号并用于提供收获信号的电能收集界面，以及耦合到电能收集的能量存储元件 用于接收收获信号的接口。 电能收集系统还包括连接到电能收集界面的电压转换器，用于产生调节电压。 采集接口采样转换信号的开路电压值，从开路电压值开始产生优化的电压值，并根据优化电压值生成上阈值电压和下阈值电压。 采集接口以开关模式控制电压转换器，使得收集信号在至少一个操作条件下具有在上限和下限阈值电压之间的值。
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Patent Agency Ranking
6.发明申请ENERGY SCAVENGING INTERFACE WITH IMPEDANCE MATCHING, METHOD FOR IMPEDANCE MATCHING OF THE ENERGY SCAVENGING INTERFACE, AND ENERGY SCAVENGING SYSTEM USING THE ENERGY SCAVENGING INTERFACE 审中-公开具有阻尼匹配的能量扫描接口，能量消除接口的阻抗匹配方法和使用能量扫描接口的能量扫描系统公开(公告)号：US20160322830A1
公开(公告)日：2016-11-03
申请号：US15132958
申请日：2016-04-19
Applicant: STMicroelectronics S.r.l.
Inventor： Stefano Ramorini , Alessandro Gasparini , Alberto Cattani
Abstract: An energy harvesting interface receives an electrical signal from an inductive transducer and outputs a supply signal. An input branch includes a first switch and a second switch connected in series between a first input terminal and an output terminal, and further a third switch and a fourth switch connected in series between a second input terminal and the output terminal. A first electrical-signal-detecting device coupled across the second switch detects a first threshold value of an electric storage current in the inductor of the transducer. A second electrical-signal-detecting device coupled across the fourth switch detects whether the electric supply current that flows through the fourth switch reaches a second threshold value lower than the first threshold value.
Abstract translation: 能量收集界面从感应传感器接收电信号并输出电源信号。 输入分支包括串联连接在第一输入端和输出端之间的第一开关和第二开关，以及串联连接在第二输入端和输出端之间的第三开关和第四开关。 耦合在第二开关上的第一电信号检测装置检测换能器的电感器中的蓄电电流的第一阈值。 耦合在第四开关上的第二电信号检测装置检测流过第四开关的电源电流是否达到低于第一阈值的第二阈值。
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公开(公告)号：US12267011B2
公开(公告)日：2025-04-01
申请号：US17122132
申请日：2020-12-15
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Cattani , Stefano Ramorini , Alessandro Gasparini
Abstract: A half bridge converter is controlled by a circuit including a differential circuit receiving a reference signal and a feedback signal which is a function of an output signal from the converter. The half bridge includes hand and low side switches. A comparator generates a PWM signal for controlling the converter as a function of the duty cycle of the PWM signal in response to a signal at an intermediate node between the hand and low side switches and an output of the differential circuit. A gain circuit block coupled between the intermediate node and the input of the comparator applies a ramp signal to the input of the comparator which is a function of the signal at the intermediate node. A variable gain is applied by the gain circuit block in order to keep a constant value for the duty cycle of said PWM signal irrespective of converter operation.
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公开(公告)号：US12132487B2
公开(公告)日：2024-10-29
申请号：US17964420
申请日：2022-10-12
Applicant: STMicroelectronics S.r.l.
Inventor： Marco Pinsero , Marco Attanasio , Alberto Cattani
IPC: H03K4/50
CPC classification number: H03K4/50
Abstract: In start-up, current is sourced by a current source to a first plate of a first capacitor while a second capacitor is maintained at zero charge. In a subsequent first operating phase, current is sourced to a first plate of the second capacitor while a second plate of the first capacitor is connected to the first plate of the second capacitor. At the end of the first operating phase, the first capacitor is discharged. In a subsequent second operating phase, current is sourced to the first plate of the first capacitor while a second plate of the second capacitor is connected to the first plate of the first capacitor. At the end of the second operating phase, the second capacitor is discharged. Steady state operation of the circuit involves an alternation of the first and second operating phases interleaved with transition phases where the first and second capacitors are discharged.
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公开(公告)号：US11387735B2
公开(公告)日：2022-07-12
申请号：US17117847
申请日：2020-12-10
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Cattani , Alessandro Gasparini
Abstract: First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch.
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公开(公告)号：US10826384B2
公开(公告)日：2020-11-03
申请号：US16504885
申请日：2019-07-08
Applicant: STMicroelectronics S.r.l.
Inventor： Giuseppe Calcagno , Alberto Cattani , Giuseppina Sapone
Abstract: A circuit includes an input node configured to receive an input reference signal. An output node is configured to provide a replica of the input reference signal with a respective scaling ratio to the input reference signal at the input node. A digital-to-analog converter has a reference input configured to receive the input reference signal from the input node, a digital input configured to receive a digital input signal having a digital signal value, and a digital-to-analog converter output configured to provide an output signal from the digital-to-analog converter resulting from conversion to analog of the digital input signal. The output node of the circuit is configured to sense the output signal from the digital-to-analog converter and to provide the replica of the input reference signal at the output node.
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