公开(公告)号：EP1501128A1

公开(公告)日：2005-01-26

申请号：EP03425494.6

申请日：2003-07-23

Applicant: STMicroelectronics S.r.l.

Inventor： Artoni, Cesare

IPC: H01L27/115 ,  H01L21/8246

CPC classification number: H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75 ,  H01L28/91

Abstract: A ferro-electric memory cell includes: a ferro-electric capacitor (80), having a first electrode (72a) and a second electrode (75a), and a ferro-electric region (73a) arranged between the first electrode (72a) and the second electrode (75a); and a selector (51), associated to the ferro-electric capacitor (80) and having conduction regions (62, 63), formed in an active area (53) of a semiconductor body (50), and a control region (58c), raised with respect to the conduction regions (62, 63). The ferro-electric capacitor (80) is arranged adjacent to at least one side (58a, 58b) of the control region (58c).

Abstract translation: 铁电存储单元包括：具有第一电极（72a）和第二电极（75a）的铁电电容器（80）和布置在第一电极（72a）和第二电极（75a）之间的铁电区域 第二电极（75a）; 和形成在半导体本体（50）的有源区域（53）中的具有导电区域（62,63）的与铁电电容器（80）相关联的选择器（51）和控制区域（58c） 相对于导电区域（62,63）升高。 铁电电容器80布置成与控制区域58c的至少一个侧面58a，58b相邻。

公开(公告)号：EP1324392A1

公开(公告)日：2003-07-02

申请号：EP01830821.3

申请日：2001-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： Zambrano, Raffaele ,  Artoni, Cesare

IPC: H01L27/115 ,  H01L21/8246 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75 ,  H01L28/91

Abstract: A memory cell (30) of a stacked type is formed by a MOS transistor (32) and a ferroelectric capacitor (33). The MOS transistor (32) is formed in an active region (40) of a substrate (30) of semiconductor material and comprises a conductive region (34a). The ferroelectric capacitor (33) is formed on top of the active region and comprises a first and a second electrodes (45, 47) separated by a ferroelectric region (46). A contact region (44a) connects the conductive region (34a) of the MOS transistor to the first electrode (45) of the ferroelectric capacitor (33). The ferroelectric capacitor (33) has a non-planar structure, formed by a horizontal portion (45) and two side portions (48) extending transversely to, and in direct electrical contact with, the horizontal portion.

Abstract translation: 堆叠型存储单元（30）由MOS晶体管（32）和强电介质电容器（33）形成。 MOS晶体管（32）形成在半导体材料的衬底（30）的有源区（40）中并且包括导电区（34a）。 铁电电容器（33）形成在有源区的顶部，并且包括由铁电区（46）分开的第一和第二电极（45,47）。 接触区域（44a）将MOS晶体管的导电区域（34a）与铁电体电容器（33）的第一电极（45）连接。 铁电电容器（33）具有由水平部分（45）和与水平部分横向并直接电接触延伸的两个侧部（48）形成的非平面结构。

公开(公告)号：EP1324392B1

公开(公告)日：2009-12-09

申请号：EP01830821.3

申请日：2001-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： Zambrano, Raffaele ,  Artoni, Cesare

IPC: H01L27/115 ,  H01L21/8246 ,  H01L21/02 ,  H01L29/51

CPC classification number: H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75 ,  H01L28/91