公开(公告)号：EP1017097A1

公开(公告)日：2000-07-05

申请号：EP98830795.5

申请日：1998-12-29

Applicant: STMicroelectronics S.r.l.

Inventor： Locati, Vanda ,  Noris Chiorda, Gianluigi ,  Besana, Luigi

IPC: H01L21/8247 ,  H01L27/115

CPC classification number: H01L27/11521

Abstract: An improved method for manufacturing virtual ground electronic memory devices (1) integrated in a semiconductor having at least one matrix of floating gate memory cells, the matrix being formed in a semiconductor substrate (2) having conductivity of a first type, with a plurality of continuous bit lines (9) extending across the substrate (2) as discrete parallel strips, and with a plurality of word lines extending in a transverse direction to the bit lines (9), comprises the following steps:

forming gate regions (4) of the memory cells to produce a plurality of continuous strips separated by parallel openings (8);
implanting a dopant to form, within said parallel openings, bit lines (9) with conductivity of a second type;
forming spacers (10) on the sidewalls of the gate regions (4);
depositing a first layer (11) of a transition metal into said parallel openings (8);
subjecting said transition metal layer (11) to a thermal treatment for reacting it with the semiconductor substrate and forming a silicide layer (12) over the bit lines (9).

Abstract translation: 一种用于制造集成在具有至少一个浮动栅极存储器单元矩阵的半导体中的虚拟接地电子存储器件（1）的改进方法，该矩阵形成在具有第一类型的导电性的半导体衬底（2）中，多个 连续的位线（9）作为离散的平行条带跨越衬底（2）延伸，并且具有沿横向方向延伸到位线（9）的多个字线，包括以下步骤：形成栅极区域（4） 存储单元以产生由平行开口（8）分开的多个连续条带; 注入掺杂剂以在所述平行开口内形成具有第二类型的导电性的位线（9）; 在所述栅极区域（4）的侧壁上形成间隔物（10）; 将过渡金属的第一层（11）沉积到所述平行开口（8）中; 对所述过渡金属层（11）进行热处理以使其与半导体衬底反应并在位线（9）上形成硅化物层（12）。