An integrated circuit with two phase-locked loops and with means for preventing locking owing to injection
    2.
    发明公开
    An integrated circuit with two phase-locked loops and with means for preventing locking owing to injection 失效
    一种集成电路,其包括两个锁相环的装置,以及用于防止注入同步

    公开(公告)号:EP0892499A1

    公开(公告)日:1999-01-20

    申请号:EP97830351.9

    申请日:1997-07-14

    CPC classification number: H03L7/07 G11B20/1403

    Abstract: The integrated circuit described comprises two phase-locked loops (R-PLL, W-PLL) each with its own oscillator (OSC-1, OSC-2). To prevent locking owing to injection between the two oscillators due to stray currents in the integrated circuit, a noise generator (N-GEN) is coupled to the oscillator (OSC-2) of one of the loops (W-PLL) and means (TM) are provided for activating the noise generator (N-GEN) in a manner such that the noise injected changes the frequency of the oscillator (OSC-2) randomly when the other loop (R-PLL) is in operation.

    Abstract translation: 集成电路描述由两锁相环(R-PLL,W-PLL)每个都有其自己的振荡器(OSC-1,OSC-2)。 为了防止由于两个振荡器之间的喷射由于在集成电路杂散电流锁定,噪声发生器(N-GEN)耦合到所述环中的一个(W-PLL)以及装置(的振荡器(OSC-2) TM)被提供用于激活噪声发生器(N-GEN)(以检查的方式做了噪声注入变化的振荡器OSC-2)随机地当其他环(R-PLL)是在操作中的频率。

    Transconductance control circuit, particularly for continous-time circuits
    4.
    发明公开
    Transconductance control circuit, particularly for continous-time circuits 失效
    Schaltungen的Transkonduktanzsteuerschaltung insbesonderefürzeitkontinuierliche

    公开(公告)号:EP0957578A1

    公开(公告)日:1999-11-17

    申请号:EP98830296.4

    申请日:1998-05-15

    CPC classification number: H03F3/3001 H03H11/0472

    Abstract: A transconductance control circuit, particularly for a continuous-time filter, comprising a transconductor (4) across which a constant voltage is input; the transconductor is connected to a DAC (7) to set a reference current (I R ); a feedback loop (9, 10, 23, 11) is provided between the output of the transconductor (4) and its input; the particularity of the circuit is the fact that it further comprises means (20, 22, 24) for mirroring the reference current (I R ) set by the DAC (7) which are suitable to mirror the current both to the feedback loop and to at least one cell of a filter which is cascade-connected.

    Abstract translation: 一种跨导控制电路,特别是用于连续时间滤波器,包括跨导体(4),输入恒定电压; 跨导器连接到DAC(7)以设置参考电流(IR); 在跨导体(4)的输出端与其输入端之间提供反馈回路(9,10,23,11) 电路的特殊性是其进一步包括用于镜像由DAC(7)设置的参考电流(IR)的装置(20,22,24),其适于将电流镜像到反馈回路并且到 串联连接的滤波器的至少一个单元。

Patent Agency Ranking