公开(公告)号：EP1473834A1

公开(公告)日：2004-11-03

申请号：EP03425273.4

申请日：2003-04-30

Applicant: STMicroelectronics S.r.l.

Inventor： Centurelli, Francesco ,  Pozzoni, Massimo ,  Scotti, Giuseppe ,  Trifiletti, Alessandro

IPC: H03L7/085 ,  H03L7/093 ,  H03D13/00

CPC classification number: H03L7/085 ,  H03D13/00 ,  H04L7/033

Abstract: A linear phase detection (PD) has a variable gain that is regulated in function of the monitored transition density of the input signal (DAT).
The transition density is sensed by a circuit (Q3', Q4', R2, C2, Ipd) that generates a signal (V2) corresponding to a time averaged common mode component of the differential current signal (OUT+, OUT-) output by the phase detector (PD).

Abstract translation: 的线性相位检测器（PD）具有可变的增益没有被在输入信号（DAT）的所监测的转变密度的函数调节。 过渡密度由一个电路感测到的（Q3”，Q4' ，R2，C2，LPD）做基因速率的信号（V2）对应于时间平均的差分电流信号的共模分量（OUT +，OUT- ）由相位检测器（PD）的输出。

公开(公告)号：EP1473828A1

公开(公告)日：2004-11-03

申请号：EP03425274.2

申请日：2003-04-30

Applicant: STMicroelectronics S.r.l.

Inventor： Centurelli, Francesco ,  Pozzoni, Massimo ,  Scotti, Giuseppe ,  Trifiletti, Alessandro

IPC: H03D13/00 ,  H03L7/085 ,  H04L7/033

CPC classification number: H03L7/085 ,  H03D13/00

Abstract: A phase detector input with a generally oscillating signal, and with a clock signal for outputting a differential signal representing the phase difference between the oscillating signal and the clock signal, comprises

a first differential pair of transistors (Q3,Q4) driven by the clock signal and by its inverted replica (CK and CKN) for generating the differential signal (OUT+,OUT-) corresponding to the currents respectively flowing in the transistors of the first differential pair;
at least an auxiliary differential pair of transistors (Q1,Q2) driven by the oscillating signal and its inverted replica (DAT and DATN) having its common current node coupled to corresponding current nodes of the first differential pair;
a current generator (Ipd) biasing all the differential pairs.
If there are long periods of time during which the oscillating signal does not switch, the precision of the frequency of the recovered clock may worsen progressively. This problem is solved by providing the phase detector with a feedback loop for regulating the current delivered by the current generator that monitors the transition density of the generally oscillating input signal and increases the bias current of the differential pairs when the transition density decreases. The output differential signal is thus generated with a greater gain thus making the VCO that is present downstream, adjust more promptly the frequency of the recovered clock.

Abstract translation: 与基因的反弹振荡信号的相位检测器输入端，并具有用于输出铃声的时钟信号表示所述振荡信号和所述时钟信号之间的相位差的差分信号，包括：第一差分对由时钟信号驱动晶体管（Q3，Q4）的 和由用于生成所述差分信号反相其复制品（CK和CKN）（OUT +，OUT-）对应于所述第一差分对的晶体管分别流动的电流; 至少由所述振荡信号和其反相复制品（DAT和DATN）驱动的辅助差分对晶体管（Q1，Q2），其具有其常见的当前节点耦合到对应的所述第一差动对的电流节点; 电流发生器（LPD）偏置所有的差分对。 如果存在的时间，这期间，所述振荡信号不切换长时间，再生时钟脉冲的频率的精度可逐渐恶化。 这种麻烦是通过提供与一个反馈环路相位检测器，用于调节由所述电流发生器提供的电流做监视基因反弹振荡输入信号的转变密度解决并增加了差分对的偏置电流。当过渡密度降低。 差分输出信号因此具有更大的增益从而使VCO确实产生存在下游，调整更迅速地恢复的时钟的频率。