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    Sense-amplifier circuit for non-volatile memories that operates at low supply voltages
    2.
    发明公开
    Sense-amplifier circuit for non-volatile memories that operates at low supply voltages 有权
    用于非易失性存储器，其在低电源电压下工作的读出放大器电路

    公开(公告)号：EP2299450A8

    公开(公告)日：2011-05-11

    申请号：EP09425360.6

    申请日：2009-09-18

    Applicant: STMicroelectronics Srl

    Inventor： Lo Giudice, Gianbattista ,  Conte, Antonino ,  Micciche', Mario ,  Rinaldi, Stefania

    IPC: G11C16/28 ,  G11C7/06 ,  G11C7/02 ,  G11C7/12

    CPC classification number: G11C16/28 ,  G11C7/02 ,  G11C7/062 ,  G11C7/067 ,  G11C7/12 ,  G11C2207/063

    Abstract: A sense-amplifier circuit (1) for a non-volatile memory is provided with: a comparison stage (15, 16a-16b) that executes, during a comparison step, a comparison between a cell current (I cell ) that flows in a memory cell (2) and through an associated bitline (BL), and a reference current (I ref ), for supplying an output signal (Out sense) indicating the state of the memory cell (2); and a precharging stage (18a-18b, 22a-22b), which supplies, during a precharging step prior to the comparison step, a precharging current to the bitline (BL) so as to charge a capacitance thereof; the comparison stage is formed by a first comparison transistor (16a) and by a second comparison transistor (16b), which are coupled in current-mirror configuration respectively to a first differential output (Out1) and to a second differential output (Out2), through which a biasing current flows. The precharging stage diverts, during the precharging step, the biasing current towards the bitline (BL) as precharging current, and allows, during the comparison step, passage of part of the biasing current towards the first differential output, enabling operation of the current mirror.

    Sense-amplifier circuit for non-volatile memories that operates at low supply voltages
    3.
    发明公开
    Sense-amplifier circuit for non-volatile memories that operates at low supply voltages 有权
    用于非易失性存储器，其在低电源电压下工作的读出放大器电路

    公开(公告)号：EP2299450A1

    公开(公告)日：2011-03-23

    申请号：EP09425360.6

    申请日：2009-09-18

    Applicant: STMicroelectronics Srl

    Inventor： Lo Giudice, Gianbattista ,  Conte, Antonino ,  Micciche', Mario ,  Rinaldi, Stefania

    IPC: G11C16/28 ,  G11C7/06 ,  G11C7/02 ,  G11C7/12

    CPC classification number: G11C16/28 ,  G11C7/02 ,  G11C7/062 ,  G11C7/067 ,  G11C7/12 ,  G11C2207/063

    Abstract: A sense-amplifier circuit (1) for a non-volatile memory is provided with: a comparison stage (15, 16a-16b) that executes, during a comparison step, a comparison between a cell current (I cell ) that flows in a memory cell (2) and through an associated bitline (BL), and a reference current (I raf ), for supplying an output signal (Out sense) indicating the state of the memory cell (2); and a precharging stage (18a-18b, 22a-22b), which supplies, during a precharging step prior to the comparison step, a precharging current to the bitline (BL) so as to charge a capacitance thereof; the comparison stage is formed by a first comparison transistor (16a) and by a second comparison transistor (16b), which are coupled in current-mirror configuration respectively to a first differential output (Out1) and to a second differential output (Out2), through which a biasing current flows. The precharging stage diverts, during the precharging step, the biasing current towards the bitline (BL) as precharging current, and allows, during the comparison step, passage of part of the biasing current towards the first differential output, enabling operation of the current mirror.

    Abstract translation: 用于非易失性存储器中的读出放大器电路（1）被提供有：在比较步骤没有执行比较阶段（15，16A-16B），一个单元电流（I小区）之间的比较中没有流 存储器单元（2），并通过向相关联的位线（BL），和一个参考电流（I REF），用于提供给输出信号（OUT感）指示的存储单元（2）的状态; 和预充电阶段（图18A-18B，22A-22B），它提供，在之前的比较步骤中，预充电电流提供给位线（BL），以便它们的充电电容的预充电步骤; 比较级由第一比较晶体管（16A）和由第二比较晶体管（16B），它们分别耦合在电流镜配置，以第一差分输出（OUT1）以及第二差分输出（OUT2）而形成 其通过偏置电流流过。 在预充电阶段转接，在预充电步骤，向位线（BL）作为预充电电流的偏置电流，并且允许，在比较步骤中，朝向所述第一差分输出的偏置电流的一部分流路，从而使操作所述电流镜的 ，

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