公开(公告)号：WO2013020231A1

公开(公告)日：2013-02-14

申请号：PCT/CA2012/050536

申请日：2012-08-07

Applicant: ADAMSON SYSTEMS ENGINEERING INC. ,  HLIBOWICKI, Stefan Roman

Inventor： HLIBOWICKI, Stefan Roman

IPC: H03F3/217 ,  H03F1/32

CPC classification number: H03F3/2173 ,  H03F1/32

Abstract: Provided are apparatuses and methods for reducing nonlinear distortions in Class D amplifiers by dynamically changing first and second threshold voltages in a pulse width modulator. A Class D amplifier apparatus is disclosed, comprising a pulse width modulator whose operation relies on a first and second threshold value, and a threshold controller which varies the thresholds in response to internal signals in the amplifier. Further, a method of processing Class D amplifier internal signals is disclosed, comprising steps involving measuring internal signals in a Class D amplifier and varying threshold signals in response to those measurements within the amplifier.

Abstract translation: 提供了通过在脉冲宽度调制器中动态地改变第一和第二阈值电压来减少D类放大器中的非线性失真的装置和方法。 公开了一种D类放大器装置，其包括其操作依赖于第一和第二阈值的脉宽调制器和响应于放大器中的内部信号改变阈值的阈值控制器。 此外，公开了一种处理D类放大器内部信号的方法，包括测量D类放大器中的内部信号和响应于放大器内的那些测量而改变阈值信号的步骤。

公开(公告)号：WO2005047845A1

公开(公告)日：2005-05-26

申请号：PCT/US2004/034663

申请日：2004-10-20

Applicant: AERO SYSTEMS ENGINEERING, INC. ,  LACEY, John, J., Jr.

Inventor： LACEY, John, J., Jr.

IPC: G01M9/04

CPC classification number: G01M9/02 ,  G01M9/04 ,  H01L29/78391 ,  H01L29/792

Abstract: An open jet wind tunnel having a test section (18), a nozzle exit (28) and a collector (30) in which the leading edge (34, 35, 36) of the collector is configured with at least a portion being non-uniformly spaced from the nozzle exit.

Abstract translation: 一种具有测试部分（18），喷嘴出口（28）和收集器（30）的开放式喷气风洞，其中收集器的前缘（34,35,36）构造成具有至少一部分， 与喷嘴出口均匀间隔开。

公开(公告)号：WO2003021423A3

公开(公告)日：2003-03-13

申请号：PCT/US2002/027970

申请日：2002-09-04

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： HANSEN, Craig ,  BATEMAN, Bruce ,  MOUSSOURIS, John

IPC: G06F7/48

Abstract: A vector-matrix multiplier unit fully utilizes a 128x128b data path for operand sizes from 8 to 128b and operand types including signed, unsigned or complex, and fixed-, floating-point, polynomial, or Galois-field while maintaining full internal precision. The present disclosure provides a system and method for improving the performance of general-purpose processor, by implementing a functional unit that computes the product of a matrix operand with a vector operand, producing a vector result. The functional unit fully utilizes the entire resources of a 128b by 128b multipliers regardless of the operand size, as the number of elements of the matrix and vector operands increase as operand size is reduced. The unit performs both fixed-point and floating-point multiplications and additions with the highest-possible intermediate accuracy with modest resources.

公开(公告)号：WO1997014101A1

公开(公告)日：1997-04-17

申请号：PCT/US1996015914

申请日：1996-10-03

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  HANSEN, Craig, C.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: G06F13/40

CPC classification number: G06F7/768 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/34 ,  G06F13/4013

Abstract: A method and data processing system for transferring data between the system and a memory system using more than one byte ordering convention by incorporating byte order information into instruction codes. The byte order information is coupled to a control unit along with other information characterizing the data transfer operation. In response to the byte order information and the data transfer operation information, the control unit generates a control signal that is coupled to a BPU. The control signal causes the BPU to rearrange the order of bytes in the data being transferred when the byte order information indicates a first byte ordering format. When the byte order information indicates a second byte ordering format, the BPU does not change the order of the bytes in the data being transferred.

Abstract translation: 一种方法和数据处理系统，用于通过将字节顺序信息并入指令代码中，使用多于一个字节排序的方式在系统和存储器系统之间传送数据。 字节顺序信息与表征数据传送操作的其他信息一起耦合到控制单元。 响应于字节顺序信息和数据传送操作信息，控制单元产生耦合到BPU的控制信号。 当字节顺序信息指示第一字节排序格式时，控制信号使BPU重新排列正在传送的数据中的字节顺序。 当字节顺序信息指示第二字节排序格式时，BPU不改变正在传送的数据中的字节顺序。

公开(公告)号：WO1997007450A1

公开(公告)日：1997-02-27

申请号：PCT/US1996013047

申请日：1996-08-16

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  HANSEN, Craig ,  MOUSSOURIS, John

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: G06F07/00

CPC classification number: G06F9/3802 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30018 ,  G06F9/30025 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30072 ,  G06F9/30087 ,  G06F9/30145 ,  G06F9/3867 ,  G06F9/3869 ,  G06F12/0875 ,  G06F12/1027 ,  G06F15/7832 ,  G06F15/7842 ,  G06F2212/2515 ,  H04N21/2365 ,  H04N21/238 ,  H04N21/23805 ,  H04N21/4347 ,  Y02D10/13

Abstract: A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data throughout of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120). The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.

Abstract translation: 一种用于处理和传送媒体数据流的通用可编程媒体处理器（12）。 媒体处理器（12）包括执行单元（100），其在整个媒体数据流中保持基本上峰值数据。 执行单元（100）包括动态分离多精度运算单元（102），可编程开关（104）和可编程扩展数学元件（106）。 高带宽外部接口（124）将基本上峰值速率的媒体数据流提供给通用寄存器文件（110）和执行单元。 存储器管理单元，以及指令和数据高速缓存/缓冲器（118,120）。 通用的可编程媒体处理器（12）被布置在由光纤电缆，同轴电缆和双绞线组成的网络结构中，以传输，处理和接收单个或统一的媒体数据流。

公开(公告)号：WO1996037978A1

公开(公告)日：1996-11-28

申请号：PCT/US1996005549

申请日：1996-04-23

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  CORRY, Alan, G. ,  MOSTYN, Graham, Y. ,  MICHEL, Jean-Yves

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: H04B15/04

CPC classification number: H04B15/04 ,  H04B2215/064

Abstract: The present invention encompasses techniques for reducing digital noise in integrated circuits and circuit assemblies, particularly dense mixed-signal integrated circuits, based upon shaping the noise from the digital circuit and concentrating it in a single, or a small number, of parts of the frequency spectrum. Generally, the presence of noise in the analog circuit is less important at certain frequencies, and therefore the spectral peak or peaks from the digital circuit can be carefully placed to result in little or no interference. As an example, a radio receiver might be designed such that the peaks of the digital noise lie between received channels, outside the band edges of each.

Abstract translation: 本发明包括基于整形来自数字电路的噪声并将其集中在频率的单个或少数部分中的集成电路和电路组件，特别是致密混合信号集成电路中的数字噪声的技术 光谱。 通常，在某些频率下，模拟电路中噪声的存在不太重要，因此可以小心地将来自数字电路的频谱峰值或峰值导致很少或没有干扰。 作为示例，可以设计无线电接收机，使得数字噪声的峰值位于接收的信道之间，每个的频带边缘之外。

公开(公告)号：WO1995022085A1

公开(公告)日：1995-08-17

申请号：PCT/US1995001735

申请日：1995-02-09

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  CHEN, Jang, Fung ,  MATTHEWS, James, A.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: G03F07/20

CPC classification number: G03F1/36 ,  G03F7/70125 ,  G03F7/70433

Abstract: In a lithographical tool utilizing off-axis illumination, masks to provide increased depth of focus and minimize CD differences between certain features are disclosed. A first mask for reducing proximity effects between isolated and densely packed features and increasing depth of focus (DOF) of isolated features is disclosed. The first mask comprises additional lines (214) referred to as scattering bars, disposed next to isolated edges. The bars are spaced a distance from isolated edges such that isolated and densely packed edge gradients substantially match so that proximity effects become negligible. The width of the bars is set so that a maximum DOF range for the isolated feature is achieved. A second mask, that is effective with quadrupole illumination only, is also disclosed. This mask "boosts" intensity levels and consequently DOF ranges for smaller square contacts so that they approximate intensity levels and DOF ranges of larger elongated contacts. Increasing the intensity levels in smaller contacts reduces critical dimension differences between variably sized contact patterns when transferred to a resist layer. The second mask comprises additional openings, referred to as anti-scattering bars, disposed about the square contact openings. The amount of separation between the edge of the smaller contact and the anti-scattering bars determines the amount of increased intensity. The width of the anti-scattering bars determines the amount of increase in DOF range. Both scattering bar and anti-scattering bars are designed to have widths significantly less than the resolution of the exposure tool so that they do not produce a pattern during exposure of photoresist.

Abstract translation: 在利用离轴照明的光刻工具中，公开了提供增加的聚焦深度并最小化某些特征之间的CD差异的掩模。 公开了用于减少隔离和密集堆叠特征之间的邻近效应的第一掩模，并且增加了隔离特征的增加的焦深（DOF）。 第一掩模包括邻近隔离边缘设置的称为散射棒的附加线（214）。 这些杆与隔离边缘间隔开一段距离，使得孤立和密集堆积的边缘梯度基本匹配，使得邻近效应变得可忽略。 条的宽度被设定为使得隔离特征的最大自由度范围达到。 还公开了仅对四极照明有效的第二掩模。 该掩模“增加”强度水平，因此适用于较小的方形触点的DOF范围，使得它们接近较大细长触点的强度水平和DOF范围。 增加较小触点中的强度水平可以减少转移到抗蚀剂层时可变尺寸的接触图案之间的临界尺寸差异。 第二掩模包括围绕正方形接触开口设置的称为防散射棒的附加开口。 较小触点的边缘与抗散射条之间的分离量决定了增加强度的量。 防散射条的宽度决定了DOF范围的增加量。 散射棒和防散射棒都被设计成具有明显小于曝光工具的分辨率的宽度，使得它们在光致抗蚀剂曝光期间不产生图案。

公开(公告)号：WO1994027204A2

公开(公告)日：1994-11-24

申请号：PCT/US1994004614

申请日：1994-04-28

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  HERNDON, William, H.

IPC: G05F03/24

CPC classification number: G05F3/24

Abstract: The present invention describes a bias potential distribution system which provides bias potentials to MOS devices while ensuring the devices' operating conditions remain constant over temperature, process, and power supply fluctuations. Further, bias potentials are generated at one main location within the logic circuit and then distributed throughout the logic circuit to all of the MOS devices or to bias voltage conversion circuits.

Abstract translation: 本发明描述了一种偏置电位分配系统，其向MOS器件提供偏置电位，同时确保器件的工作条件在温度，过程和电源波动上保持恒定。 此外，在逻辑电路内的一个主要位置处产生偏置电位，然后在整个逻辑电路中分布到所有MOS器件或偏置电压转换电路。

公开(公告)号：DE69526040D1

公开(公告)日：2002-05-02

申请号：DE69526040

申请日：1995-12-08

Applicant: AIRO SYSTEMS ENGINEERING INC

Inventor： LONG DEAN F

IPC: F01D25/30 ,  G01M9/04 ,  G01M15/00 ,  G01M9/06

Abstract: A jet engine test cell capable of dissipating infrasound includes an engine test section (18), an augmentor (24) and an exhaust stack (28) having a structure (33) near its open end (31) for dissipating infrasound.

公开(公告)号：AT215224T

公开(公告)日：2002-04-15

申请号：AT95119399

申请日：1995-12-08

Applicant: AIRO SYSTEMS ENGINEERING INC

Inventor： LONG DEAN F

IPC: F01D25/30 ,  G01M9/04 ,  G01M15/00 ,  G01M9/06

Abstract: A jet engine test cell capable of dissipating infrasound includes an engine test section (18), an augmentor (24) and an exhaust stack (28) having a structure (33) near its open end (31) for dissipating infrasound.