公开(公告)号：TW200733566A

公开(公告)日：2007-09-01

申请号：TW096103492

申请日：2007-01-31

Applicant: 渥弗森微電子公司 WOLFSON MICROELECTRONICS PLC

Inventor： 約翰 保羅 雷梭 LESSO, JOHN PAUL

IPC: H03L

CPC classification number: H03L7/0812 ,  H03L7/10

Abstract: 一種延遲鎖定迴路電路係具有:一個參考訊號輸入端,其係用於接收一個週期參考訊號;及許多訊號輸出端,其係用於輸出自該參考訊號推導出的個別輸出訊號,且彼此具有一個期望的相位關係。該延遲鎖定迴路電路係包含:一個電壓控制延遲線(Voltage Controlled Delay Line, VCDL),其係包含複數個串聯的相同延遲級;及一個反饋迴路,其係包含一個相位比較器,其係用於控制該電壓控制延遲線,使得許多級上的總計延遲係與該週期參考訊號之週期匹配。訊號輸出端係被連接,以自該延遲線內個別的節點推導出其個別的輸出訊號。該相位比較器係比較自可變延遲線內個別節點而來的參考訊號之第一及第二不同延遲版本之相位,該可變延遲線係僅由複數個相同的延遲級所分隔。因此,工作週期失真係被最小化。起始控制電路係配置成;(i)在起始操作之前最小化該可變延遲線之延遲;及(ii)導致該相位比較器在決定該些被比較訊號內轉變之相對順序時,忽略一個訊號內的一個第一個轉變。因此,假的鎖定及諧波鎖定係被消除,同時允許一個非常廣的範圍之輸入頻率。

Abstract in simplified Chinese: 一种延迟锁定回路电路系具有:一个参考信号输入端,其系用于接收一个周期参考信号;及许多信号输出端,其系用于输出自该参考信号推导出的个别输出信号,且彼此具有一个期望的相位关系。该延迟锁定回路电路系包含:一个电压控制延迟线(Voltage Controlled Delay Line, VCDL),其系包含复数个串联的相同延迟级;及一个反馈回路,其系包含一个相位比较器,其系用于控制该电压控制延迟线,使得许多级上的总计延迟系与该周期参考信号之周期匹配。信号输出端系被连接,以自该延迟线内个别的节点推导出其个别的输出信号。该相位比较器系比较自可变延迟线内个别节点而来的参考信号之第一及第二不同延迟版本之相位,该可变延迟线系仅由复数个相同的延迟级所分隔。因此,工作周期失真系被最小化。起始控制电路系配置成;(i)在起始操作之前最小化该可变延迟线之延迟;及(ii)导致该相位比较器在决定该些被比较信号内转变之相对顺序时,忽略一个信号内的一个第一个转变。因此,假的锁定及谐波锁定系被消除,同时允许一个非常广的范围之输入频率。

公开(公告)号：TW200642296A

公开(公告)日：2006-12-01

申请号：TW095109171

申请日：2006-03-17

Applicant: 伍爾夫生微電子股份有限公司 WOLFSON MICROELECTRONICS PLC

Inventor： 弗瑞斯 彼得 FRITH, PETER

IPC: H03M

CPC classification number: H03M1/667 ,  H03M1/0607 ,  H03M1/0682 ,  H03M1/804 ,  H03M3/356 ,  H03M3/502

Abstract: 本發明乃有關於數位對類比轉換器，且特別是但非獨一地和換式電容器數位對類比轉換器(DACs)相關。本發明提供一耦合在一運算放大器之輸入與輸出之間的回饋電容器；一充電電容器和一切換設備，該切換設備配置成在一充電期間依數位信號而定將該充電電容器的第一端耦合至一第一參考電壓或一第二參考電壓，該切換設備進一步更被配置成在該充電期間將充電電容器之第二端耦合至與合至該充電電容器第一端之參考電壓成反相的第二參考電壓或第一參考電壓，此切換設備更被配置成於一穩定期間將該充電電容器耦合至該回饋電容器。

Abstract in simplified Chinese: 本发明乃有关于数码对模拟转换器，且特别是但非独一地和换式电容器数码对模拟转换器(DACs)相关。本发明提供一耦合在一运算放大器之输入与输出之间的回馈电容器；一充电电容器和一切换设备，该切换设备配置成在一充电期间依数码信号而定将该充电电容器的第一端耦合至一第一参考电压或一第二参考电压，该切换设备进一步更被配置成在该充电期间将充电电容器之第二端耦合至与合至该充电电容器第一端之参考电压成反相的第二参考电压或第一参考电压，此切换设备更被配置成于一稳定期间将该充电电容器耦合至该回馈电容器。

公开(公告)号：WO2014174283A1

公开(公告)日：2014-10-30

申请号：PCT/GB2014/051262

申请日：2014-04-23

Applicant: WOLFSON MICROELECTRONICS PLC

Inventor： DEAS, James ,  LESSO, John Paul ,  HARDY, Emmanuel ,  IDO, Toru

IPC: H04R3/06 ,  H04R19/00 ,  G01D5/244 ,  H03F3/187 ,  H03M3/00 ,  G01P15/125 ,  H04R29/00

CPC classification number: H04R3/06 ,  G01D3/02 ,  G01D5/24 ,  G01D5/24476 ,  G01P15/125 ,  G01P2015/0865 ,  H03M1/0609 ,  H03M1/12 ,  H03M3/352 ,  H03M3/458 ,  H04R19/005 ,  H04R19/04 ,  H04R29/004 ,  H04R2201/003 ,  H04R2499/11

Abstract: This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (S corr ); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.

Abstract translation: 本申请涉及用于处理由MEMS电容换能器产生的感测信号以补偿这种感测信号中的失真的电路。 电路具有用于接收感测信号的输入端（204）和用于基于所述感测信号输出输出信号的输出（205）之间的信号路径。 补偿电路（206,207）被配置为在沿着信号路径的第一点处监视信号并产生校正信号（Scorr）; 并且基于所述校正信号沿着所述信号路径在至少第二点处修改信号。 校正信号作为沿着信号路径的第一点处的信号的值的函数产生，以便将补偿分量引入到补偿感测信号中的失真分量的输出信号中。 信号路径中的第一点可以在信号路径中的第二点之前或之后。 可以在信号路径的模拟或数字部分中执行监视，并且在任一情况下，修改可以应用于信号路径的模拟或数字部分。

公开(公告)号：WO2012080742A3

公开(公告)日：2012-08-02

申请号：PCT/GB2011052492

申请日：2011-12-16

Applicant: WOLFSON MICROELECTRONICS PLC ,  LESSO JOHN PAUL

Inventor： LESSO JOHN PAUL

IPC: H03F1/30

CPC classification number: H03F3/181 ,  H03F1/304 ,  H03F3/183 ,  H03F2200/03 ,  H03K3/013

Abstract: This application describes apparatus and method for DC offset compensation. An amplifier (102) receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) (108) and a counter (109). The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator (108) may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer (110) so as to sequentially produce the first and second VCO output signals.

Abstract translation: 本申请描述了用于DC偏移补偿的装置和方法。 放大器（102）接收输入信号（AIN）并提供放大的输出信号（SOUT），并且反馈路径提供DC偏移补偿。 反馈路径包括至少一个压控振荡器（VCO）（108）和计数器（109）。 VCO随时间提供基于所述放大的输出信号的第一VCO输出信号和基于参考信号（VREF）的第二VCO输出信号。 计数器基于第一VCO输出信号和基于第二VCO输出信号的第二脉冲计数产生第一脉冲计数，并且基于第一和第二脉冲计数的比较来提供补偿信号。 一个压控振荡器（108）可以基于所述放大器输出信号和来自多路复用器（110）的参考信号来顺序地接收信号，以便顺序地产生第一和第二VCO输出信号。

公开(公告)号：WO2011010143A3

公开(公告)日：2011-08-18

申请号：PCT/GB2010051190

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  NOTMAN ANDREW ,  MCCLOY-STEVENS MARK ,  MACFARLANE DOUGLAS ,  HAIPLIK HOLGER

Inventor： NOTMAN ANDREW ,  MCCLOY-STEVENS MARK ,  MACFARLANE DOUGLAS ,  HAIPLIK HOLGER

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/38

CPC classification number: H02M3/1588 ,  H02M1/38 ,  H02M2001/0009 ,  H02M2001/0032 ,  Y02B70/1466

Abstract: This invention relates to methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter (100) is operable so that a low side supply switch (20) may be turned off, before the high side supply switch (10) is turned on. During the period when both switches are off the current loop control (501) remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor (800) for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract translation: 本发明涉及用于控制DC-DC转换器的方法和装置，特别是在谷值电流模式中。 DC-DC转换器（100）可操作，使得在高侧供电开关（10）接通之前，低侧供电开关（20）可以被关断。 在两个开关断开的期间，电流环控制（501）保持有效，并且模拟电感器（L）电流的变化。 一个实施例使用用于无损电流感测的电流传感器（800），并且通过在低侧开关断开时保持电流传感器（ISNS）的输出的值并且将仿真的斜坡信号 （VISLP），直到电感电流达到零。 还公开了基于最小传导时间采用脉冲跳跃操作模式的实施例。 本发明实现了从连续导通模式，不连续导通模式和脉冲跳跃的无缝转换，并提供了在低电流负载下高效的转换器。

公开(公告)号：WO2011010141A3

公开(公告)日：2011-04-21

申请号：PCT/GB2010051188

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  MCCLOY-STEVENS MARK

Inventor： MCCLOY-STEVENS MARK

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/38

CPC classification number: H02M3/1588 ,  H02M1/38 ,  H02M2001/0009 ,  H02M2001/0032 ,  Y02B70/1466

Abstract: This invention relates to apparatus and method for providing current limiting in a DC- DC converter and especially to methods and apparatus suitable for a start-up mode of operation. The invention monitors the inductor (L) current when the high side supply switch (10) is on against a peak current limit threshold (5001). If the inductor current reaches the peak current limit threshold the high side switch is turned off. The inductor current when the low side switch is off is monitored against a valley current threshold (5002). As long as the inductor current is above the valley current threshold turn on of the low side switch is inhibited. In this way current limiting is provided and the problems of stair-stepping are avoided. Embodiments employing lossless current sensing are described. The invention may be implemented in a start-up mode of operation wherein the converter is controlled purely by the peak current limit and valley current threshold which are increased over time.

Abstract translation: 本发明涉及用于在DC-DC转换器中提供电流限制的装置和方法，特别涉及适用于启动操作模式的方法和装置。 当高侧电源开关（10）接通峰值限流阈值（5001）时，本发明监测电感（L）电流。 如果电感电流达到峰值电流限制阈值，则高侧开关关闭。 监测低侧开关关断时的电感电流，抵抗谷值电流阈值（5002）。 只要电感电流高于谷值电流阈值，低侧开关的导通就被禁止。 以这种方式提供电流限制，并且避免了阶梯式的问题。 描述了采用无损电流感测的实施例。 本发明可以在启动操作模式中实现，其中转换器纯粹受到随时间增加的峰值电流限制和谷值电流阈值的控制。

公开(公告)号：WO2010094966A3

公开(公告)日：2011-04-21

申请号：PCT/GB2010050277

申请日：2010-02-18

Applicant: WOLFSON MICROELECTRONICS PLC ,  AL-NAIMI KHALDOON TAHA ,  DOBSON ROBERT

Inventor： AL-NAIMI KHALDOON TAHA ,  DOBSON ROBERT

IPC: G10K11/178 ,  G10L21/0232

CPC classification number: G10K11/178 ,  G10K2210/108 ,  G10K2210/3213 ,  G10L21/0232 ,  H03G3/32

Abstract: A noise cancellation signal is generated based on detected ambient noise, such that the noise cancellation signal and a wanted sound signal can be applied to a speaker. Gain control is applied to the wanted sound signal based on a comparison between the detected ambient noise level and the wanted sound signal level, for example such that the level of the wanted sound signal after the gain has been applied exceeds the level of a detected ambient noise signal by a certain threshold. Steps may also be taken such that the total level of the wanted sound signal after the gain has been applied and of the detected ambient noise signal do not exceed a second threshold, to avoid saturating the speaker to which they are applied.

Abstract translation: 基于检测到的环境噪声产生噪声消除信号，使得可以将噪声消除信号和有用声音信号应用于扬声器。 基于检测到的环境噪声电平和所需声音信号电平之间的比较，将增益控制应用于所需声音信号，例如使得增益之后的所需声音信号的电平超过检测到的环境的电平 噪声信号达到一定阈值。 还可以采取步骤，使得已经应用增益之后的有用声音信号的总电平和检测到的环境噪声信号的总电平不超过第二阈值，以避免使其所应用的扬声器饱和。

公开(公告)号：WO2011010151A3

公开(公告)日：2011-01-27

申请号：PCT/GB2010/051199

申请日：2010-07-21

Applicant: WOLFSON MICROELECTRONICS PLC ,  MCCLOY-STEVENS, Mark ,  NOTMAN, Andrew

Inventor： MCCLOY-STEVENS, Mark ,  NOTMAN, Andrew

IPC: H02M3/158

Abstract: A regulator circuit (400) comprises an input for receiving an input voltage; an output stage, configured to switch between said input voltage and a reference voltage to generate an output voltage, in dependence on a modulated signal; a controller (600), configured to receive an error signal (V ERROR ) on a control input and to provide said modulated signal to said output stage;an error amplifier (411), for providing said error signal to said controller (600) in dependence on said output voltage; and presetting circuitry (418), configured to estimate said error signal in dependence on at least said input voltage, and for presetting said control input with said estimated error signal.

公开(公告)号：WO2011010146A2

公开(公告)日：2011-01-27

申请号：PCT/GB2010/051193

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  HAIPLIK, Holger ,  GRAEFJE, Dieter

Inventor： HAIPLIK, Holger ,  GRAEFJE, Dieter

IPC: G06F1/14

CPC classification number: G06F1/14 ,  G06F1/30

Abstract: The present invention provides a real-time clock circuit (54), comprising: an oscillator (122); and a counter (124), coupled to an output of the oscillator (122), for generating a real-time clock value. In a first mode the oscillator (122) is configured to generate oscillations and the counter (124) is configured to increment the real-time clock value based on the oscillations. In a second mode the oscillator (122) is stopped, and the counter (124) is configured to retain the real-time clock value at a frozen value.

Abstract translation: 本发明提供一种实时时钟电路（54），包括：振荡器（122）; 以及耦合到所述振荡器（122）的输出的计数器（124），用于产生实时时钟值。 在第一模式中，振荡器（122）被配置为产生振荡，并且计数器（124）被配置为基于振荡来增加实时时钟值。 在第二模式中，振荡器（122）停止，并且计数器（124）被配置为将实时时钟值保持在冻结值。

公开(公告)号：WO2011010144A2

公开(公告)日：2011-01-27

申请号：PCT/GB2010/051191

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  NOTMAN, Andrew ,  MCCLOY-STEVENS, Mark

Inventor： NOTMAN, Andrew ,  MCCLOY-STEVENS, Mark

IPC: H02M3/158

CPC classification number: H02M3/1588 ,  H02M1/38 ,  H02M2001/0009 ,  H02M2001/0032 ,  Y02B70/1466

Abstract: This invention relates to methods and apparatus for control of DC-DC converters. The DC-DC converter (100) is operable so that the low side supply switch (20) may be inhibited from turning on in a cycle following the high side supply switch (10) turning off. Turn on of the low side switch is inhibited if the time between turn off of the high side switch (10) and the inductor (L) current reaching zero is less than a predetermined duration. Inhibiting the low side switch from turning on can prevent the inductor current from going negative, which would reduce the efficiency of the converter. When turn on of the low side switch is inhibited the inductor current flows through a parallel path, such as a parasitic body diode associated with the low side switch, which allows current flow in one direction only.

Abstract translation: 本发明涉及用于控制DC-DC转换器的方法和设备。 DC-DC转换器（100）可操作，使得低侧供电开关（20）可以在高侧供电开关（10）关闭之后的一个周期中被禁止接通。 如果高侧开关（10）的关断和电感器（L）电流达到零之间的时间少于预定持续时间，则禁止低侧开关的接通。 禁止低侧开关导通可以防止电感电流变负，这会降低转换器的效率。 当低压侧开关导通被禁止时，电感电流流过并联路径，例如与低压侧开关相关的寄生体二极管，这允许电流仅在一个方向流动。