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公开(公告)号:US20250166995A1
公开(公告)日:2025-05-22
申请号:US19034986
申请日:2025-01-23
Applicant: ASM IP Holding B.V.
Inventor: Petro Deminskyi , Charles Dezelah , Jiyeon Kim , Giuseppe Alessio Verni , Maart Van Druenen , Qi Xie , Petri Räisänen
IPC: H01L21/28 , C23C16/38 , C23C16/455 , C23C16/50 , H10D64/66
Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
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公开(公告)号:US20250149325A1
公开(公告)日:2025-05-08
申请号:US19014870
申请日:2025-01-09
Applicant: ASM IP Holding B.V.
Inventor: Shaoren Deng , Andrea Illiberi , Daniele Chiappe , Eva Tois , Giuseppe Alessio Verni , Michael Givens , Varun Sharma , Chiyu Zhu , Shinya Iwashita , Charles Dezelah , Viraj Madhiwala , Jan Willem Maes , Marko Tuominen , Anirudhan Chandrasekaran
Abstract: Methods for cleaning a substrate are disclosed. The substrate comprises a dielectric surface and a metal surface. The methods comprise providing a cleaning agent to the reaction chamber.
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公开(公告)号:US20250109491A1
公开(公告)日:2025-04-03
申请号:US18900571
申请日:2024-09-27
Applicant: ASM IP Holding B.V.
Inventor: Eric James Shero , Marko Tuominen , Saima Ali , Bhagyesh Purohit , Eva E. Tois , Kizysztof Kamil Kachel , Adam Vianna , Vincent Vandalon , Charles Dezelah
IPC: C23C16/04
Abstract: The disclosure relates to methods, processing assemblies, reactants and vapor deposition vessels for selective vapor-phase deposition of inhibitor material on a substrate comprising two surfaces. In some embodiments of the disclosure, the inhibition material is deposited on the first surface of the substrate, whereas substantially no inhibitor material is deposited on the second surface of the substrate. The inhibitor material is formed by contacting the substrate with a vapor-phase inhibitor reactant comprising a silicon atom bonded to an oxygen atom and to a second atom selected from nitrogen and halogens.
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公开(公告)号:US20250092515A1
公开(公告)日:2025-03-20
申请号:US18967466
申请日:2024-12-03
Applicant: ASM IP Holding B.V.
Inventor: Viraj Madhiwala , Daniele Chiappe , Eva Tois , Marko Tuominen , Charles Dezelah , Shaoren Deng , Anirudhan Chandrasekaran , YongGyu Han , Michael Givens , Andrea llliberi , Vencent Vandalon
IPC: C23C16/40 , C23C16/455 , H01J37/32
Abstract: Methods and vapor deposition assemblies of selectively depositing material comprising silicon and oxygen on a first surface of a substrate relative to a second surface of the substrate by a cyclic deposition process are disclosed. The methods comprise providing a substrate into a reaction chamber, providing a metal or metalloid catalyst into the reaction chamber in a vapor phase, providing a silicon precursor comprising an alkoxy silane compound into the reaction chamber in a vapor phase and providing a plasma into the reaction chamber to form a reactive species for forming a material comprising silicon and oxygen on the first surface. The methods may comprise subcycles for, for example, adjusting the proportions of material components.
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公开(公告)号:US20250092510A1
公开(公告)日:2025-03-20
申请号:US18889140
申请日:2024-09-18
Applicant: ASM IP Holding B.V.
Inventor: Bhagyesh Purohit , Saima Ali , Eva E. Tois , Marko Tuominen , Charles Dezelah
IPC: C23C16/04 , C23C16/455
Abstract: The disclosure relates to methods, processing assemblies, for selective vapor-phase deposition of inhibitor material on a substrate comprising two surfaces. In some embodiments of the disclosure, the inhibition material is deposited on the first conductive surface of the substrate, whereas substantially no inhibitor material is deposited on the second surface of the substrate. The inhibitor material is formed by contacting the substrate with a vapor-phase inhibitor reactant comprising alkylsilane having at least one alkoxy group bonded to a silicon atom.
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96.
公开(公告)号:US12237171B1
公开(公告)日:2025-02-25
申请号:US18379228
申请日:2023-10-12
Applicant: ASM IP Holding B.V.
Inventor: Giuseppe Alessio Verni , Qi Xie , Henri Jussila , Charles Dezelah , Jiyeon Kim , Eric James Shero , Paul Ma
IPC: H01L21/285 , H01L29/49
Abstract: Methods and systems for depositing vanadium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium nitride layer onto a surface of the substrate. The cyclical deposition process can include providing a vanadium halide precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process.
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公开(公告)号:US12215416B2
公开(公告)日:2025-02-04
申请号:US18387914
申请日:2023-11-08
Applicant: ASM IP Holding B.V.
Inventor: Eric Christopher Stevens , Bhushan Zope , Shankar Swaminathan , Charles Dezelah , Qi Xie , Giuseppe Alessio Verni
IPC: C23C16/34 , C23C16/02 , C23C16/08 , C23C16/455 , G11C5/06 , H01L21/28 , H01L29/06 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786 , H10B12/00
Abstract: Methods for depositing a molybdenum nitride film on a surface of a substrate are disclosed. The methods may include: providing a substrate into a reaction chamber; and depositing a molybdenum nitride film directly on the surface of the substrate by performing one or more unit deposition cycles of cyclical deposition process, wherein a unit deposition cycle may include, contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, and contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor. Semiconductor device structures including a molybdenum nitride film are also disclosed.
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公开(公告)号:US20250037988A1
公开(公告)日:2025-01-30
申请号:US18914437
申请日:2024-10-14
Applicant: ASM IP Holding B.V.
Inventor: Varun Sharma , Daniele Chiappe , Eva Tois , Viraj Madhiwala , Marko Tuominen , Charles Dezelah , Michael Givens , Tom Blomberg
IPC: H01L21/02
Abstract: The current disclosure relates to methods of depositing silicon oxide on a substrate, methods of forming a semiconductor device and a method of forming a structure. The method comprises providing a substrate in a reaction chamber, providing a silicon precursor in the reaction chamber, the silicon precursor comprising a silicon atom connected to at least one oxygen atom, the at least one oxygen atom being connected to a carbon atom, and providing a reactant comprising hydrogen atoms in the reaction chamber to form silicon oxide on the substrate.
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99.
公开(公告)号:US20240395555A1
公开(公告)日:2024-11-28
申请号:US18791605
申请日:2024-08-01
Applicant: ASM IP Holding B.V.
Inventor: Qi Xie , Eric James Shero , Charles Dezelah , Giuseppe Alessio Verni , Petri Raisanen
IPC: H01L21/28 , C23C16/34 , C23C16/455 , C23C16/52 , H01L29/49
Abstract: Methods and systems for depositing chromium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process, depositing a chromium nitride layer onto a surface of the substrate. The deposition process can include providing a chromium precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The deposition process may be a thermal cyclical deposition process.
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公开(公告)号:US20240363358A1
公开(公告)日:2024-10-31
申请号:US18647931
申请日:2024-04-26
Applicant: ASM IP Holding B.V.
Inventor: Timothee Blanquart , Charles Dezelah , René Henricus Jozef Vervuurt
IPC: H01L21/311 , H01L21/02
CPC classification number: H01L21/31122 , H01L21/02321 , H01L21/02337
Abstract: Methods for chemically etching a target layer are disclosed. In particular, methods for etching a target layer by cyclical chemical vapor etching processes and atomic layer etching processes are disclosed. Exemplary apparatus for performing chemical etching processes are further disclosed.
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