公开(公告)号：US12118376B2

公开(公告)日：2024-10-15

申请号：US17235206

申请日：2021-04-20

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics Application GmbH

Inventor： Deepak Baranwal ,  Amritanshu Anand ,  Roberto Colombo ,  Boris Vittorelli

IPC: G06F9/455 ,  G06F9/48 ,  G06F9/50

CPC classification number: G06F9/45558 ,  G06F9/455 ,  G06F9/45533 ,  G06F9/48 ,  G06F9/4812 ,  G06F9/4843 ,  G06F9/485 ,  G06F9/4856 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/5083 ,  G06F9/5088 ,  G06F2009/4557 ,  G06F2009/45575

Abstract: Disclosed herein is hardware for easing the process of changing the execution mode of a virtual machine and its associated resources. By adopting the hardware, it is possible to trigger a change in the execution mode in an automatic way, without software intervention, and without interfering with the execution of other virtual machines. In addition, in case an error has occurred for a virtual machine and it is detected, the hardware can be used to disable the resources associated with that virtual machine and generate notification of the completion this operation to other hardware, which will complete the reset of the virtual machine. By adopting the hardware, the execution mode change is simplified and offers configurability and flexibility for a system running multiple virtual machines.

公开(公告)号：US20240340202A1

公开(公告)日：2024-10-10

申请号：US18644590

申请日：2024-04-24

Applicant: STMicroelectronics International N.V.

Inventor： Iztok BRATUZ ,  Vinko KUNC ,  Maksimiljan STIGLIC

IPC: H04L25/49

CPC classification number: H04L25/4904

Abstract: Various embodiments of the present disclosure disclose decoding techniques for mitigating data corruption due to duty cycle distortion, jitter, and other distortions to a digital signal. Decoding processes, apparatuses, and systems are provided that utilize a decoding framework for improving the accuracy of output bit streams generated from digital signals. An example process receives data indicative of a digital signal, generates a signal measurement for the digital signal that includes signal length descriptive between a two rising edges of a digital signal or two falling edges of the demodulated digital signal, and generates at least one portion of an output bit stream for the digital signal based at least in part on the signal measurement.

公开(公告)号：US12111999B1

公开(公告)日：2024-10-08

申请号：US18242918

申请日：2023-09-06

Applicant: STMicroelectronics International N.V.

Inventor： Sang Soo Lee ,  MooKyung Kang

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/04182 ,  G06F3/041662 ,  G06F3/0446 ,  G06F2203/04107

Abstract: According to an embodiment, a method for a touch scan is proposed. The method includes operating a device in first and second modes corresponding to the device, respectively, being wirelessly and not wirelessly charged. In each mode for each frame, the method includes dividing a frequency range corresponding to a touch-sensing technology into M or N positive integer numbers of equal and sequential frequency intervals, where N is greater than M. In the first mode, the method includes determining a first frequency interval of the M frequency intervals with the least noise and performing the touch scan using a first frequency within the first frequency interval. In the second mode for each frame, the method includes determining a second frequency interval of the N frequency intervals with the least noise and performing the touch scan using a second frequency within the second frequency interval.

公开(公告)号：US20240334087A1

公开(公告)日：2024-10-03

申请号：US18613987

申请日：2024-03-22

Applicant: STMicroelectronics International N.V.

Inventor： Raffaele BIANCHINI ,  Raul Andres BIANCHI ,  Mohammed AL-RAWHANI

IPC: H04N25/773 ,  H01L27/146 ,  H01L31/02 ,  H01L31/107 ,  H04N25/443 ,  H04N25/709

CPC classification number: H04N25/773 ,  H01L27/14612 ,  H01L31/02027 ,  H04N25/443 ,  H04N25/709 ,  H01L31/107

Abstract: The present disclosure relates to an avalanche photodiode pixel including: a transistor adapted to be controlled by an enable signal having a first state for controlling the enabling of the pixel and a second state for controlling the disabling of the pixel, the transistor being configured to couple an avalanche photodiode of the pixel to a node of application of a substrate voltage when the enable signal is in the first state; and an output circuit adapted to be controlled by the enable signal and configured to provide a pixel output signal when the enable signal is in the first state and to block the pixel output signal when the enable signal is in the second state.

公开(公告)号：US20240334080A1

公开(公告)日：2024-10-03

申请号：US18616454

申请日：2024-03-26

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Laurent SIMONY

IPC: H04N25/616 ,  H03F3/45 ,  H04N25/709 ,  H04N25/77

CPC classification number: H04N25/616 ,  H03F3/45475 ,  H04N25/709 ,  H04N25/77 ,  H03F2200/69

Abstract: An electronic circuit includes image acquisition cells, wherein each cell has a photodetector coupled to a first node of the cell, and an amplifying transistor having a gate connected to the first node, a conduction node coupled to an output of the cell, and a node for controlling a back gate voltage. The amplifying transistor is configured so that its threshold voltage varies according to the back gate voltage. A control circuit adjusts a voltage applied to the control node of the back gate voltage of the amplifying transistor of one of the cells according to a comparison of the voltage present at the cell output and a reference voltage.

公开(公告)号：US20240333431A1

公开(公告)日：2024-10-03

申请号：US18601381

申请日：2024-03-11

Applicant: STMicroelectronics International N.V.

Inventor： Roland Van Der Tuijn ,  Christophe Arnal

IPC: H04L1/1607 ,  H04L5/00

CPC classification number: H04L1/1657 ,  H04L5/0055

Abstract: A method of controlling a receiver of communications includes data packets being transmitted at constant intervals, and circuits of the receiver being, in each interval, set to standby between the correct reception of at least one data packet and a time preceding the beginning of the next interval.

公开(公告)号：US20240333292A1

公开(公告)日：2024-10-03

申请号：US18616951

申请日：2024-03-26

Applicant: STMicroelectronics International N.V.

Inventor： Cao-Thong TU ,  David COUSINARD ,  David CHAMPION ,  Matteo CONTALDO

IPC: H03L7/195 ,  H03L7/081

CPC classification number: H03L7/195 ,  H03L7/0818

Abstract: An electronic device applies a frequency offset function to a first signal having a first frequency. The device includes a delay element configured to output a second signal corresponding to the first signal delayed by a duration equal to a first period of said signal divided by four. A circuit branch includes a first circuit configured to divide the frequency of the first signal by a given number coupled in series with a second circuit configured to implement an integration. The circuit branch outputs a third signal and a fourth signal. A single side band mixing circuit processes the first signal, second signal, third signal and fourth signal to generate an output signal.

公开(公告)号：US20240333175A1

公开(公告)日：2024-10-03

申请号：US18614887

申请日：2024-03-25

Applicant: STMicroelectronics International N.V.

Inventor： Yannick HAGUE ,  Guillaume THIENNOT ,  Romain LAUNOIS

IPC: H02M7/53846 ,  H02M7/5383

CPC classification number: H02M7/538463 ,  H02M7/538466 ,  H02M7/53835

Abstract: A converter circuit is configured to convert a DC voltage into an AC voltage using a first thyristor and second thyristor in series in a first branch, a third thyristor and fourth thyristor in series in a second branch in an antiparallel configuration to the first branch, and a first transistor and second transistor in series in a third branch. When the AC voltage is equal to zero, and when the first thyristor is conductive and the first and second transistors are non-conductive, a first positive current is applied to the gate of the antiparallel third thyristor to control turn on and ensure that the current circulating in the first thyristor falls below the holding current.

公开(公告)号：US20240332406A1

公开(公告)日：2024-10-03

申请号：US18610829

申请日：2024-03-20

Applicant: STMicroelectronics International N.V.

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Olivier WEBER ,  Franck ARNAUD

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7394 ,  H01L29/66325

Abstract: A bipolar transistor includes a first PN junction and a second PN junction. A first gate is located on the first PN junction. A second gate is located on the second PN junction.

公开(公告)号：US20240332365A1

公开(公告)日：2024-10-03

申请号：US18614485

申请日：2024-03-22

Applicant: STMicroelectronics International N.V.

Inventor： Björn MAGNUSSON LINDGREN ,  Carlo RIVA

IPC: H01L29/16 ,  C30B28/14 ,  C30B29/36 ,  H01L21/02 ,  H01L29/04

CPC classification number: H01L29/1608 ,  C30B28/14 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/0262 ,  H01L29/04

Abstract: Various embodiments of wafers include a polycrystalline silicon carbide (SiC) layer or base substrate. The polycrystalline silicon carbide (SiC) layer may have a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter) such that the polycrystalline silicon carbide layer is a low resistivity polycrystalline silicon carbide layer. The polycrystalline silicon carbide layer may have grains with a grain size less than or equal to 1 millimeter (mm), and may have a non-columnar structure. The polycrystalline silicon carbide layer may have a warpage less than or equal to 75 μm (micrometers). A monocrystalline silicon carbide (SiC) layer may be coupled to the polycrystalline silicon carbide (SiC) layer by a bonding layer. The monocrystalline silicon carbide layer may be thinner than the polycrystalline silicon carbide layer.