Abstract:
The invention concerns a method of analog to digital voltage conversion comprising: generating a quadratic signal based on the square of a time signal (t); generating a ramp signal (V RMP ) based on said quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of said analog input voltage with said ramp signal.
Abstract:
An AD conversion apparatus includes a shift signal generating portion configured to generate n shift signals ( n is a natural number greater than one) of which amplitudes are different from each other; a shift signal controlling portion configured to control the shift signal generating portion; a compounding portion configured to compound input analog signal and the n shift signals sequentially into n first signals; an AD converting portion configured to execute AD conversion to convert the n first signals into n second signals; and a signal processing portion configured to calculate an average of the n second signals to generate output digital signal.
Abstract:
Procédé pour numériser, avec une précision supérieure à N bits, des signaux à fréquence intermédiaire FI, en particulier des signaux vidéo, à l'aide d'un convertisseur A/D (3) donnant, sur sa sortie, des signaux numériques à seulement N bits,selon lequel:
on effectue un échantillonnage des signaux dans un échantillonneur-bloqueur (4) à une fréquence f S , avec une précision correspondant à Q bits, Q étant supérieur à N ; on ajoute aux signaux échantillonnés, un signal (6) en rampe d'une amplitude (h) correspondant sensiblement à celle d'un bit de moindre poids (LSB) du convertisseur A/D (3) ; on envoie sur l'entrée du convertisseur A/D (3) la somme de chaque signal échantillonné et du signal en rampe (6), et on fait travailler le convertisseur A/D (3) à une fréquence nf S , multiple f S , de sorte qu'à la sortie du convertisseur A/D (3) on obtient des signaux numériques à la fréquence nf S , - et on effectue la moyenne de p signaux numériques pour obtenir, à une fréquence inférieure, égale à nf S /p, des signaux numérisés ayant un nombre de bits supérieur à N.
Abstract:
Todays consumer video A/D and D/A converters or other digital video processing systems are restricted to 8-bit resolution. The quantizing noise introduced in these systems can result in visible artefacts in gradually shaped areas of an image or can lead in applications based on some critical algorithms to very severe distortions. It is known to use a dither signal for masking contouring or correlation effects by adding a non-correlated noise signal to the video signal prior to A/D conversion. For achieving an increased bit resolution for a given A/D or D/A converter, a special multilevel dither signal in conjunction with multiple oversampling is added to the bandlimited analog input signal which is afterwards converted with a clock rate of n*f s and to the digital input signal, respectively.
Abstract:
A low-pass and band-pass delta-sigma (ΔΣ) analog-to-digital converter (ADC) device for sensor interface is disclosed. The device includes a first stage comprising a low-resolution passive integrator-based noise-shaping successive approximation register (SAR) ADC and a second stage comprising a voltage-controlled oscillator (VCO)-ADC.
Abstract:
Methods and devices for digitizing an analog repetitive signal using waveform averaging are described. An example method includes generating a discrete set of analog dither offset voltages, wherein at least two of the discrete set of analog dither offset voltages are different from each other, receiving the analog repetitive signal comprising multiple instances of a waveform, wherein the waveform has a waveform duration, generate a timing alignment to align each waveform of the analog repetitive signal and the corresponding analog dither offset voltage over the waveform duration, combining, based on the timing alignment, each waveform and the corresponding analog dither offset voltage over the waveform duration to produce an analog output signal, converting the analog output signal to a digital output signal, and producing, based on the timing alignment, a digital averaged signal based on averaging the multiple instances of the waveform in the analog output signal.
Abstract:
The present invention provides a signal processor that improves a resolution of a phase detection without increasing a clock frequency of a controller or decreasing a frequency of an excitation signal. A signal processor 10 includes a comparator 11 that compares a signal obtained by phase modulating a carrier frequency at a rotor rotation angle of a resolver with a dither signal.