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公开(公告)号：US20170374741A1
公开(公告)日：2017-12-28
申请号：US15700433
申请日：2017-09-11
Inventor： Jonathan Douglas Hatch , Stephen McGarry Hatch
CPC classification number: H05K1/0306 , H05K1/02 , H05K1/028 , H05K1/0393 , H05K1/115 , H05K1/144 , H05K3/0023 , H05K3/0064 , H05K3/007 , H05K3/048 , H05K3/103 , H05K3/125 , H05K3/386 , H05K3/389 , H05K3/4611 , H05K3/4644 , H05K2201/0145 , H05K2201/0154 , H05K2201/05 , H05K2201/09009 , H05K2203/0152
Abstract: A PCB page blank includes a flexible substrate, a curable adhesive, a conductive layer, and a conductive layer support. The flexible substrate receives an opaque negative circuit pattern thereon. Portions of the curable adhesive not obscured by the circuit pattern may bond to portions of the conductive layer when exposed to light. The bonded portions of the conductive layer shear or tear from non-bonded portions of the conductive layer such that the bonded portions remain with the flexible substrate and the non-bonded portions remain with the conductive layer support when the flexible substrate and the conductive layer support are separated. The flexible substrate and the bonded portions of the conductive layer thus form a PCB prototype with the bonded portions of the conductive layer forming circuit traces of the circuit pattern.
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公开(公告)号：US20170127546A1
公开(公告)日：2017-05-04
申请号：US15255026
申请日：2016-09-01
Applicant: Samsung Display Co., Ltd.
Inventor： Minsoo Kim , Kinyeng Kang
CPC classification number: H05K7/1427 , G06F3/1446 , G09G3/20 , G09G2300/0426 , G09G2380/02 , H05K1/028 , H05K1/111 , H05K5/0017 , H05K2201/09009
Abstract: A display device is disclosed. In one aspect, the display device includes a first display unit including a first display area, a first left pad area outside a first left end portion of the first display area, and a first right pad area outside a first right end portion of the first display area. The first right end portion is opposite to the first left end portion. The first display unit is bent at a first portion between the first display area and the first left pad area and bent at a second portion between the first display area and the first right pad area. The first display area is bent such that the first left and right end portions are adjacent to each other, and the first left and right pad areas are located inside the first display unit. The display device also includes a first printed circuit board corresponding to both the first left and right pad areas.
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公开(公告)号：US09480142B2
公开(公告)日：2016-10-25
申请号：US14289401
申请日：2014-05-28
Applicant: YAZAKI CORPORATION
Inventor： Akira Harao , Mototatsu Matsunaga , Yasuhiro Sugiura , Minoru Kubota
IPC: H01R9/00 , H05K1/02 , H01R12/72 , H05K3/36 , H05K1/11 , H05K3/10 , H01L23/498 , H05K7/10 , H05K1/05 , H05K3/20 , H05K3/34 , H05K1/14
CPC classification number: H05K1/0204 , H01L23/49861 , H01L2224/05571 , H01L2224/48091 , H01L2225/1094 , H01R12/728 , H05K1/0203 , H05K1/05 , H05K1/056 , H05K1/11 , H05K1/14 , H05K3/10 , H05K3/202 , H05K3/3447 , H05K3/368 , H05K7/1046 , H05K2201/09009 , H05K2201/09063 , H05K2201/10757 , H05K2201/10787 , H05K2203/025 , Y10T29/49147 , Y10T29/49155
Abstract: Disclosed is wiring substrate and method of manufacturing thereof, the wiring substrate including a substrate having a high thermal conductive layer, in which at least one of a front surface and a rear surface of the substrate is a mounting surface for a variety of components; a window section formed in the substrate; and a connection terminal extended from an inside surface portion of the window section and bending in a direction perpendicular to a surface of the substrate.
Abstract translation: 公开了布线基板及其制造方法，所述布线基板包括具有高导热层的基板，其中所述基板的前表面和后表面中的至少一个是用于各种部件的安装表面; 形成在所述基板中的窗部; 以及从所述窗部的内表面部分延伸并在垂直于所述基板的表面的方向上弯曲的连接端子。
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公开(公告)号：US20160037631A1
公开(公告)日：2016-02-04
申请号：US14445438
申请日：2014-07-29
Applicant: PIXTRONIX, INC.
Inventor： Richard Steven Payne
CPC classification number: H05K1/0306 , G02F1/13452 , G02F1/13454 , H05K1/0298 , H05K1/111 , H05K1/141 , H05K1/144 , H05K3/305 , H05K3/32 , H05K2201/09009 , H05K2201/10128 , H05K2203/173
Abstract: This disclosure describes a display having a substrate including a surface and a first plurality of routing lines on the surface. Each of the first plurality of routing lines is separated from an adjacent routing line by at least a first distance. The display also includes a interposer that is bonded to the surface. The interposer includes a first interface that connects the first plurality of conductive routing lines with the interposer. The interposer also includes a plurality of interposer routing lines that are connected to the first interface. Each of the plurality of interposer routing lines is separated from an adjacent interposer routing line by at least a second distance where the second distance is less than the first distance.
Abstract translation: 本公开描述了一种显示器，其具有包括表面的基板和表面上的第一多个布线线。 第一组多个路由线路中的每一条路线与相邻的路由线路分开至少第一距离。 显示器还包括结合到表面的插入器。 插入器包括将第一多个导电布线线与插入件连接的第一接口。 插入器还包括连接到第一接口的多个插入器路由线。 多个插入器路由线中的每一个与相邻插入器路由线分开至少第二距离，其中第二距离小于第一距离。
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公开(公告)号：US20160007461A1
公开(公告)日：2016-01-07
申请号：US14855798
申请日：2015-09-16
Applicant: NGK INSULATORS, LTD.
Inventor： Tatsuro Takagaki , Yasunori Iwasaki , Sugio Miyazawa , Akiyoshi Ide , Hirokazu Nakanishi
CPC classification number: H05K1/115 , C04B35/111 , C04B35/119 , C04B35/634 , C04B2235/3206 , C04B2235/3217 , C04B2235/3225 , C04B2235/3244 , C04B2235/3281 , C04B2235/3418 , C04B2235/6023 , C04B2235/606 , C04B2235/612 , C04B2235/6582 , C04B2235/662 , C04B2235/72 , C04B2235/77 , C04B2235/786 , C04B2235/95 , H01B3/12 , H01B17/56 , H05K1/03 , H05K1/0306 , H05K3/00 , H05K3/0014 , H05K3/0029 , H05K2201/09009 , Y10T428/24273
Abstract: It is provided an insulating substrate including through holes for conductors arranged in the insulating substrate. A thickness of the insulating substrate is 25 to 100 μm, and a diameter of the through hole is 20 to 100 μm. The insulating substrate includes a main body part and exposed regions exposed to the through holes and is composed an alumina sintered body. A relative density of the alumina sintered body is 99.5 percent or higher. The alumina sintered body has a purity of 99.9 percent or higher, and has an average grain size of 3 to 6 μm in said main body part. Alumina grains are plate-shaped in the exposed region and the plate-shaped alumina grains have an average length of 8 to 25 μm.
Abstract translation: 提供了绝缘基板，其包括布置在绝缘基板中的导体的通孔。 绝缘基板的厚度为25〜100μm，通孔的直径为20〜100μm。 绝缘基板包括主体部分和暴露于通孔的暴露部分，并且由氧化铝烧结体构成。 氧化铝烧结体的相对密度为99.5％以上。 氧化铝烧结体的纯度为99.9％以上，所述主体部的平均粒径为3〜6μm。 氧化铝颗粒在暴露区域是板状的，板状氧化铝颗粒的平均长度为8至25μm。
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Patent Agency Ranking
公开(公告)号：US20140262451A1
公开(公告)日：2014-09-18
申请号：US14289401
申请日：2014-05-28
Applicant: YAZAKI CORPORATION
Inventor： Akira HARAO , Mototatsu MATSUNAGA , Yasuhiro SUGIURA , Minoru KUBOTA
CPC classification number: H05K1/0204 , H01L23/49861 , H01L2224/05571 , H01L2224/48091 , H01L2225/1094 , H01R12/728 , H05K1/0203 , H05K1/05 , H05K1/056 , H05K1/11 , H05K1/14 , H05K3/10 , H05K3/202 , H05K3/3447 , H05K3/368 , H05K7/1046 , H05K2201/09009 , H05K2201/09063 , H05K2201/10757 , H05K2201/10787 , H05K2203/025 , Y10T29/49147 , Y10T29/49155
Abstract: Disclosed is wiring substrate and method of manufacturing thereof, the wiring substrate including a substrate having a high thermal conductive layer, in which at least one of a front surface and a rear surface of the substrate is a mounting surface for a variety of components; a window section formed in the substrate; and a connection terminal extended from an inside surface portion of the window section and bending in a direction perpendicular to a surface of the substrate.
Abstract translation: 公开了布线基板及其制造方法，所述布线基板包括具有高导热层的基板，其中所述基板的前表面和后表面中的至少一个是用于各种部件的安装表面; 形成在所述基板中的窗部; 以及从所述窗部的内表面部分延伸并在垂直于所述基板的表面的方向上弯曲的连接端子。
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公开(公告)号：JP2017220665A
公开(公告)日：2017-12-14
申请号：JP2017098628
申请日：2017-05-18
Applicant: ジョンソン エレクトリック ソシエテ アノニム
IPC: H05K1/16 , H02K11/30 , H02K11/026 , H05K1/02
CPC classification number: H02K11/30 , H02K11/026 , H02K11/40 , H02K13/105 , H05K1/0216 , H05K1/11 , H05K1/162 , H05K2201/09009
Abstract: 【課題】電子部品の体積を減らすとともに、モータの電磁放射を有効に減らすプリント回路基板及びモータを提供する。 【解決手段】プリント回路基板は、本体と、本体の第1の表面に配置された第1の導電パターン層と、本体の第2の表面に配置された第2の導電パターン層とを含む。第1の導電パターン層及び第2の導電パターン層は、コンデンサを形成する。本開示は、プリント回路基板を有するモータをさらに提供する。 【選択図】図1
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公开(公告)号：JP6162898B2
公开(公告)日：2017-07-12
申请号：JP2016531544
申请日：2014-08-07
Applicant: エルジー・ケム・リミテッド
Inventor： チェ・ヒュン・キム , ウン・キュ・ソン , ス・チョン・イ , チェ・チン・キム , チョル−ヒ・パク , チー−スン・パク , シン・ヒー・チョン , サン・ユン・チョン , ハン・ナ・チョン
CPC classification number: C23C18/31 , C09D5/24 , C23C18/1608 , C23C18/1612 , C23C18/1641 , C23C18/1689 , C23C18/204 , C23C18/2053 , C23C18/22 , C23C18/30 , C23C18/32 , C23C18/38 , C25D5/02 , C25D5/56 , H05K1/0296 , H05K1/09 , H05K3/02 , H05K3/181 , H05K2201/09009
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公开(公告)号：JP5204908B1
公开(公告)日：2013-06-05
申请号：JP2012069660
申请日：2012-03-26
Applicant: Jx日鉱日石金属株式会社
CPC classification number: H05K1/09 , B32B3/30 , B32B15/01 , B32B15/08 , B32B15/20 , B32B2307/306 , B32B2307/714 , B32B2457/08 , C22C9/00 , C25D1/04 , C25D3/12 , C25D3/38 , C25D5/12 , C25D9/08 , H05K1/0313 , H05K3/022 , H05K3/025 , H05K3/06 , H05K3/181 , H05K3/188 , H05K3/381 , H05K3/383 , H05K3/388 , H05K2201/09009 , Y10T428/12549 , Y10T428/12569 , Y10T428/12611 , Y10T428/12792 , Y10T428/12847 , Y10T428/12903 , Y10T428/1291
Abstract: 【課題】銅箔の少なくとも一方の面に、粒子長さの10%の位置の粒子根元の平均直径D1が0.2μm〜1.0μmであり、粒子長さL1と前記粒子根元の平均直径D1との比L1/D1が15以下の銅箔の粗化処理層を有することを特徴とするプリント配線板用銅箔を提供する。
【解決手段】粗化処理層を有するプリント配線用銅箔と樹脂を積層した後、銅層をエッチングにより除去した樹脂の表面において、凹凸を有する樹脂粗化面の穴の占める面積の総和が20％以上であることを特徴とするプリント配線板用銅箔。 銅箔の他の諸特性を劣化することなく、上記の回路浸食現象を回避する半導体パッケージ基板用銅箔を開発することである。 特に、銅箔の粗化処理層を改善し、銅箔と樹脂との接着強度を高めることができるプリント配線板用銅箔及びその製造方法。
【選択図】図２Abstract translation: 提供一种用于印刷电路板的铜箔，其在其至少一个表面上包括粗糙层。 在粗糙层中，粒子底部的平均粒径D1与粒子的底部相隔10％的粒子长度为0.2〜1.0μm，粒子长度L1与平均直径D1的比L1 / D1 在颗粒底部为15或更小。 在印刷电路板用铜箔中，当将具有粗糙层的印刷布线用铜箔层压到树脂上，然后通过蚀刻除去铜层时，占据具有凹凸的树脂粗糙面的孔面积之和为 20％以上。 本发明涉及开发用于半导体封装基板的铜箔，其可以避免电路侵蚀而不会导致铜箔的其它性能的劣化。 特别地，本发明的目的是提供一种用于印刷线路板的铜箔和铜箔的制造方法，其中可以通过改善粗糙层来提高铜箔和树脂之间的粘附强度 的铜箔。
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公开(公告)号：US12041716B2
公开(公告)日：2024-07-16
申请号：US17757880
申请日：2020-12-18
Applicant: LG INNOTEK CO., LTD.
Inventor： Nam Heon Kim
CPC classification number: H05K1/028 , H05K1/0313 , H05K2201/0141 , H05K2201/0158 , H05K2201/09009
Abstract: A substrate according to an embodiment includes an insulating layer having a grain formed therein extending in a first direction; and a circuit pattern disposed on the insulating layer; wherein the insulating layer includes an upper surface and a plurality of outer side surfaces; wherein the plurality of outer side surfaces includes: a first outer side surface extending in the same first direction as the first direction having the grain formed in the insulating layer; and a second outer side surface extending in a second direction different from the first direction and excluding the first outer side surface, wherein the first outer side surface has a first surface roughness; and wherein the second outer side surface has a second surface roughness different from the first surface roughness.
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