Abstract:
An improved BiCMOS logic circuit utilizes an emitter-coupled pair of bipolar transistors for differentially comparing an input signal with a logic reference level. Each of the bipolar transistors are resistively loaded by a network of p-channel metal-oxide-semiconductor (PMOS) transistors coupled in parallel. At least one of the parallel combination of transistors has its gate coupled to a control signal providing a variable load resistance. The control signal is preferably provided by a feedback network which maintains a constant voltage swing across the network over temperature.
Abstract:
An optical modulator utilizing a magnetic semiconductor device, whose operation is based on the Hall effect, includes a magnetic material formed on a semiconductor substrate. When an incoming beam of light having a dominant polarization direction is directed onto the magnetic material it becomes modulated. The result is an outgoing beam of light which has a rotated plane of polarization when compared to the dominant polarization direction. The direction of the rotated plane of polarization is indicative of the information stored in the magnetic material. The modulator of the present invention further includes a means for writing the information to the magnetic material and a semiconductor sensor means for electrically verifying the contents of the magnetic material.
Abstract:
A lift conveyor for conveying loads from one level to another comprises a first and second pair of offset endless chains trained over sprockets which guide the chains through their travel in a substantially parallel and spaced-apart relationship. The sprockets are rotatably driven by a motor, and load-carrying connectors connected to the chains define horizontal platforms between levels for carrying the loads and are bendable during their travel over the sprockets. By-pass stations are provided at each floor adjacent the chains which are selectively operable to by-pass any given floor. The by-pass station includes a lift table and a hydraulic device for raising and lowering the lift table. A horizontal roller conveyor on the lift table receives the loads and conveys them to a storage terminal, or when the table is raised in a by-pass mode, serves to re-load the load back onto the lift conveyor for lifting and unloading to another floor.
Abstract:
An improvement for reducing proximity effects comprised of additional lines, referred to as intensity leveling bars, into the mask pattern. The leveling bars perform the function of adjusting the edge intensity gradients of isolated edges in the mask pattern, to match the edge intensity gradients of densely packed edges. Leveling bars are placed parallel to isolated edges such that intensity gradient leveling occurs on all isolated edges of the mask pattern. In addition, the leveling bars are designed to have a width significantly less than the resolution of the exposure tool. Therefore, leveling bars that are present in the mask pattern produce resist patterns that completely developed away when a nominal exposure energy is utilized during exposure of photoresist.
Abstract:
A virtual memory system including a local-to-global virtual address translator for translating local virtual addresses having associated task specific address spaces into global virtual addresses corresponding to an address space associated with multiple tasks, and a global virtual-to-physical address translator for translating global virtual addresses to physical addresses. Protection information is provided by each of the local virtual-to-global virtual address translator, the global virtual-to-physical address translator, the cache tag storage, or a protection information buffer depending on whether a cache bit or miss occurs during a given data or instruction access. The cache is configurable such that it can be configured into a buffer portion or a cache portion for faster cache accesses.
Abstract:
A mask 206 for use in an apparatus utilized for optically transferring a lithographic pattern corresponding to an integrated circuit from said mask 206 onto a semiconductor substrate, said apparatus utilizing off-cases illumination, said pattern including at least one feature, said mask 206 comprising: an additional feature 215, 216 adjacent to and surrounding said at least one feature, said additional feature 215, 216 being disposed at a predetermined distance from all edges of said at least one feature and having the same transparency as said at least one feature, the width of said additional feature 215, 216 being selected such that the depth of focus of said at least one feature is increased.