CIRCUIT ARRANGEMENT
    101.
    发明申请
    CIRCUIT ARRANGEMENT 审中-公开
    电路布置

    公开(公告)号:WO1997043877A1

    公开(公告)日:1997-11-20

    申请号:PCT/IB1997000377

    申请日:1997-04-09

    CPC classification number: H05B41/2985 H05B41/3925 H05B41/42 Y10S315/07

    Abstract: The invention relates to a circuit arrangement for igniting and supplying a lamp by means of a substantially square-wave voltage with frequency f1. It is possible to dim the lamp by giving the frequency of the substantially square-wave voltage a value f2 which is different from f1. A protection circuit prevents damage to the lamp and to the circuit arrangement if the lamp current does not flow any more at this frequency f2.

    Abstract translation: 本发明涉及一种用于通过具有频率f1的基本方波电压来点亮和提供灯的电路装置。 通过给出基本上方波电压的频率与f1不同的值f2可以使灯变暗。 如果灯电流在该频率f2不再流动,则保护电路可以防止对灯和电路装置的损坏。

    METHOD OF FIXING A STACK OF PLATES; A STACK OF PLATES; A THIN-TYPE DISPLAY DEVICE PROVIDED WITH A STACK OF PLATES
    102.
    发明申请
    METHOD OF FIXING A STACK OF PLATES; A STACK OF PLATES; A THIN-TYPE DISPLAY DEVICE PROVIDED WITH A STACK OF PLATES 审中-公开
    固定板块的方法; 板堆; 具有堆叠板的薄型显示设备

    公开(公告)号:WO1997043780A1

    公开(公告)日:1997-11-20

    申请号:PCT/IB1997000303

    申请日:1997-03-26

    CPC classification number: H01J31/124 H01J9/185 H01J2217/49207

    Abstract: The method of successively positioning and fixing n plates forming a stack (21-26) relative to a mounting face (20), includes the positioning and alignment, if necessary, of n plates (21-26), each plate (21-26) being retained, after it has been positioned relative to the mounting face (20) or relative to plates (21-25) which have already been positioned, by means of a vacuum in a vacuum pipe in the plates (21-25) already positioned. When all plates (21-26) are positioned and retained by a vacuum system connected to vacuum apertures (201-206) in the mounting face (20), successive plates (21-26) can be fixed relative to each other so as to form the stack of n plates (21-26). The vacuum pipes form ducts in the plates (21-25), at least one duct comprising i (i = 1, 2, 3, ..., n-1) corresponding apertures (215; 214, 224; 213, 223, 233; 212, 222, 232, 242; 211, 221, 231, 241, 251) in i plates (21-25) and being closed by a plate i+1 (21-26). Such stacks are used in thin-type display devices.

    Abstract translation: 连续定位和固定相对于安装面(20)形成叠层(21-26)的n个板的方法包括如有必要地定位和对准n个板(21-26),每个板(21-26) )在其已经被定位在相对于已经定位的板(21-25)的板(21-25)已经被定位在板(21-25)中的真空管中之后被保持 定位。 当所有板(21-26)由连接到安装面(20)上的真空孔(201-206)的真空系统定位和保持时,连续的板(21-26)可相对于彼此固定,以便 形成n个板的堆叠(21-26)。 真空管道在板(21-25)中形成管道,至少一个管道包括i(i = 1,2,3,...,n-1)对应的孔(215; 214,224; 213,223, 233,212,222,232,242,211,221,231,241,251),并由板i + 1(21-26)封闭。 这种堆叠用于薄型显示装置。

    PROCESSOR WITH AN INSTRUCTION CACHE
    103.
    发明申请
    PROCESSOR WITH AN INSTRUCTION CACHE 审中-公开
    处理器与指令高速缓存

    公开(公告)号:WO1997043715A2

    公开(公告)日:1997-11-20

    申请号:PCT/IB1997000552

    申请日:1997-05-14

    CPC classification number: G06F12/0895

    Abstract: An instruction cache has an input bus and an output bus, the input bus receiving bits of an instruction for storage in the instruction cache, the output bus comprising a set of parallel lines for outputting the bits of an instruction in parallel. To simplify the layout of the cache, the output order of the bits of the instruction on the set of parallel lines differs from a logical order of receiving the bits via the input bus. The bits of instruction words are shuffled prior to loading into the cache. Then when the words are read out of cache, the read lines need not cross.

    Abstract translation: 指令高速缓冲存储器具有输入总线和输出总线,所述输入总线接收用于存储在指令高速缓存中的指令的位,所述输出总线包括用于并行地输出指令的位的一组并行线。 为了简化缓存的布局,并行线上的指令位的输出顺序与通过输入总线接收位的逻辑顺序不同。 在加载到高速缓存之前,指令字的位被混洗。 然后当这些单词从缓存读出时,读取行不需要交叉。

    VLIW PROCESSOR WHICH PROCESSES COMPRESSED INSTRUCTION FORMAT
    104.
    发明申请
    VLIW PROCESSOR WHICH PROCESSES COMPRESSED INSTRUCTION FORMAT 审中-公开
    过程压缩指令格式的VLIW处理器

    公开(公告)号:WO1997043710A2

    公开(公告)日:1997-11-20

    申请号:PCT/IB1997000558

    申请日:1997-05-15

    Abstract: A VLIW processor uses a compressed instruction format that allows greater efficiency in use of cache and memory. Instructions are byte aligned and of variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

    Abstract translation: VLIW处理器使用压缩指令格式,可以更高效地使用缓存和内存。 指令是字节对齐且长度可变。 分支目标未压缩。 格式位指定在以下指令中使用多少个问题槽。 NOPS不存储在内存中。 个别操作根据特征进行压缩,例如是否无结果,守卫,简短,零,一元或二进制。 指令以压缩形式存储在内存和缓存中。 从高速缓存中读出指令后即可解除指令。

    BALLAST
    106.
    发明申请
    BALLAST 审中-公开
    镇流器

    公开(公告)号:WO1997042796A1

    公开(公告)日:1997-11-13

    申请号:PCT/IB1997000428

    申请日:1997-04-23

    CPC classification number: G05F1/613 H05B41/382 H05B41/3921 Y10S315/04

    Abstract: A ballast for powering a lamp at deep dim levels. Driving circuitry includes a feedback loop which compares a desired dim level to a signal representing actual lamp power consumption. The loop is closed once the signal representing actual lamp power consumption equals the desired dim level. During ignition, a switch in response to the lamp voltage reaching or exceeding a predetermined threshold opens the feedback loop. The feedback loop is closed once the lamp has been ignited. By closing the loop as soon as the lamp has been ignited, ignition flash is minimized.

    Abstract translation: 一个镇流器,用于为深度昏暗的灯光供电。 驱动电路包括反馈回路,其将期望的调光水平与表示实际灯功率消耗的信号进行比较。 一旦表示实际的灯功率消耗的信号等于所需的昏暗水平,环路闭合。 在点火期间,响应于灯电压达到或超过预定阈值的开关打开反馈回路。 灯泡点燃后,反馈回路闭合。 一旦灯被点亮就关闭环路,点火闪光灯被最小化。

    SEGMENTED VIDEO CODING AND DECODING METHOD AND SYSTEM
    107.
    发明申请
    SEGMENTED VIDEO CODING AND DECODING METHOD AND SYSTEM 审中-公开
    分割视频编码和解码方法和系统

    公开(公告)号:WO1997042766A1

    公开(公告)日:1997-11-13

    申请号:PCT/IB1997000461

    申请日:1997-04-30

    CPC classification number: G06T9/40 H04N19/20 H04N19/54

    Abstract: The invention describes a method and system for coding a sequence of pictures using an active triangular mesh coding scheme and a partition tree. It subdivides the current picture into a mesh of blocks with nodes located on high gradient points, further subdividing the blocks into two triangles. The system comprises a projection circuit, for estimating on the basis of the mesh defined for a previous picture a projected mesh made of polygons and corresponding to the current picture, a mesh coding circuit for coding motion and texture associated to said projected mesh, and a texture error detection and coding circuit. Applications are very low bit rate coding, multimedia applications.

    Abstract translation: 本发明描述了一种使用有效三角形网格编码方案和分区树对图像序列进行编码的方法和系统。 它将当前图片细分为具有位于高梯度点上的节点的网格,进一步将块划分成两个三角形。 该系统包括投影电路,用于基于为先前图像定义的网格估计由多边形构成的并与当前图像相对应的投影网格,用于对与所述投影网格相关联的运动和纹理进行编码的网格编码电路,以及 纹理错误检测和编码电路。 应用程序是非常低的比特率编码,多媒体应用。

    DIGITAL TELEVISION SYNCHRONIZATION
    108.
    发明申请
    DIGITAL TELEVISION SYNCHRONIZATION 审中-公开
    数字电视同步

    公开(公告)号:WO1997041664A2

    公开(公告)日:1997-11-06

    申请号:PCT/IB1997000424

    申请日:1997-04-21

    CPC classification number: H04N5/08 H04N5/46 H04N7/012 H04N7/56

    Abstract: An apparatus for automatically synchronizing a video system to one of a plurality of composite synchronizing signals in accordance with a plurality of known video formats, includes a number of synchronizing signal stripper circuits, corresponding, respectively, to a number of types of composite synchronizing signals, a horizontal analyzer, having a plurality of horizontal standard identification circuits corresponding to an identification circuit for each known horizontal synchronizing signal rate for each type of composite synchronizing signal, for determining an approximate horizontal synchronizing signal rate and a vertical analyzer, having a plurality of vertical rate identification circuits corresponding to the number of different known vertical rates, for determining the vertical synchronizing signal rate.

    Abstract translation: 一种用于根据多种已知视频格式将视频系统自动同步到多个复合同步信号之一的装置,包括分别对应于多种类型的复合同步信号的多个同步信号分离器电路, 水平分析器,具有多个水平标准识别电路,对应于用于每种类型的复合同步信号的每个已知水平同步信号速率的识别电路,用于确定近似水平同步信号速率和垂直分析器,具有多个垂直 速率识别电路对应于不同已知垂直速率的数量,用于确定垂直同步信号速率。

    ELECTRODELESS LOW-PRESSURE DISCHARGE LAMP
    110.
    发明申请
    ELECTRODELESS LOW-PRESSURE DISCHARGE LAMP 审中-公开
    无电极低压放电灯

    公开(公告)号:WO1997040519A1

    公开(公告)日:1997-10-30

    申请号:PCT/IB1997000392

    申请日:1997-04-10

    CPC classification number: H01J65/048

    Abstract: An electrodeless low-pressure discharge lamp (1) according to the invention comprises a light-transmitting discharge vessel (10) which is provided with an ionizable filling. The discharge vessel has a cavity (11) in which an electric coil (2) is arranged which is provided with a primary and a secondary winding (21, 22, respectively) around a metal body (20), the primary winding (21) of the coil being connected to a first and a second electrical conductor (31, 32, respectively) of a cable (3) for connection to a first and a second ouptut terminal (51, 52, respectively) of a high-frequency supply (5), the second output terminal (52) of the supply (5) being free from high-frequency voltage variations relative to ground (M). The secondary winding (22) is connected at one of its ends (22a) to the second electrical conductor (32) and has a further, free end (22b). The electrical conductor (31, 32) are electrically insulated from one another, the second electrical conductor (32) surrounding the first electrical conductor (31). The metal body (20) is capacitively coupled to the second electrical conductor (32). A reduction in electromagnetic interference fields is realized thereby in a simple manner.

    Abstract translation: 根据本发明的无电极低压放电灯(1)包括具有可离子化填充物的透光放电容器(10)。 放电容器具有空腔(11),其中布置有电线圈(2),其围绕金属体(20)设置有初级和次级绕组(21,22),初级绕组(21) 线圈连接到电缆(3)的第一和第二电导体(31,32),用于连接到高频电源的第一和第二输出端子(51,52) 5),电源(5)的第二输出端(52)相对于地(M)没有高频电压变化。 次级绕组(22)在其一端(22a)连接到第二电导体(32),并具有另外的自由端(22b)。 电导体(31,32)彼此电绝缘,第二电导体(32)围绕第一电导体(31)。 金属体(20)电容耦合到第二电导体(32)。 因此,以简单的方式实现电磁干扰场的减少。

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