Abstract:
The invention relates to a circuit arrangement for igniting and supplying a lamp by means of a substantially square-wave voltage with frequency f1. It is possible to dim the lamp by giving the frequency of the substantially square-wave voltage a value f2 which is different from f1. A protection circuit prevents damage to the lamp and to the circuit arrangement if the lamp current does not flow any more at this frequency f2.
Abstract:
The method of successively positioning and fixing n plates forming a stack (21-26) relative to a mounting face (20), includes the positioning and alignment, if necessary, of n plates (21-26), each plate (21-26) being retained, after it has been positioned relative to the mounting face (20) or relative to plates (21-25) which have already been positioned, by means of a vacuum in a vacuum pipe in the plates (21-25) already positioned. When all plates (21-26) are positioned and retained by a vacuum system connected to vacuum apertures (201-206) in the mounting face (20), successive plates (21-26) can be fixed relative to each other so as to form the stack of n plates (21-26). The vacuum pipes form ducts in the plates (21-25), at least one duct comprising i (i = 1, 2, 3, ..., n-1) corresponding apertures (215; 214, 224; 213, 223, 233; 212, 222, 232, 242; 211, 221, 231, 241, 251) in i plates (21-25) and being closed by a plate i+1 (21-26). Such stacks are used in thin-type display devices.
Abstract:
An instruction cache has an input bus and an output bus, the input bus receiving bits of an instruction for storage in the instruction cache, the output bus comprising a set of parallel lines for outputting the bits of an instruction in parallel. To simplify the layout of the cache, the output order of the bits of the instruction on the set of parallel lines differs from a logical order of receiving the bits via the input bus. The bits of instruction words are shuffled prior to loading into the cache. Then when the words are read out of cache, the read lines need not cross.
Abstract:
A VLIW processor uses a compressed instruction format that allows greater efficiency in use of cache and memory. Instructions are byte aligned and of variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.
Abstract:
A ballast for powering a lamp at deep dim levels. Driving circuitry includes a feedback loop which compares a desired dim level to a signal representing actual lamp power consumption. The loop is closed once the signal representing actual lamp power consumption equals the desired dim level. During ignition, a switch in response to the lamp voltage reaching or exceeding a predetermined threshold opens the feedback loop. The feedback loop is closed once the lamp has been ignited. By closing the loop as soon as the lamp has been ignited, ignition flash is minimized.
Abstract:
The invention describes a method and system for coding a sequence of pictures using an active triangular mesh coding scheme and a partition tree. It subdivides the current picture into a mesh of blocks with nodes located on high gradient points, further subdividing the blocks into two triangles. The system comprises a projection circuit, for estimating on the basis of the mesh defined for a previous picture a projected mesh made of polygons and corresponding to the current picture, a mesh coding circuit for coding motion and texture associated to said projected mesh, and a texture error detection and coding circuit. Applications are very low bit rate coding, multimedia applications.
Abstract:
An apparatus for automatically synchronizing a video system to one of a plurality of composite synchronizing signals in accordance with a plurality of known video formats, includes a number of synchronizing signal stripper circuits, corresponding, respectively, to a number of types of composite synchronizing signals, a horizontal analyzer, having a plurality of horizontal standard identification circuits corresponding to an identification circuit for each known horizontal synchronizing signal rate for each type of composite synchronizing signal, for determining an approximate horizontal synchronizing signal rate and a vertical analyzer, having a plurality of vertical rate identification circuits corresponding to the number of different known vertical rates, for determining the vertical synchronizing signal rate.
Abstract:
The invention provides an organic electroluminescent device whose electroluminescence efficiency is independent of the work function of the cathode material, and whose service life under ambient conditions is excellent without the necessity of taking additional protective measures. These properties are obtained as a result of the fact that an organic layer of the device comprises mobile ions which are compensated by immobile ions in such a manner that the polarity of all mobile ions is the same.
Abstract:
An electrodeless low-pressure discharge lamp (1) according to the invention comprises a light-transmitting discharge vessel (10) which is provided with an ionizable filling. The discharge vessel has a cavity (11) in which an electric coil (2) is arranged which is provided with a primary and a secondary winding (21, 22, respectively) around a metal body (20), the primary winding (21) of the coil being connected to a first and a second electrical conductor (31, 32, respectively) of a cable (3) for connection to a first and a second ouptut terminal (51, 52, respectively) of a high-frequency supply (5), the second output terminal (52) of the supply (5) being free from high-frequency voltage variations relative to ground (M). The secondary winding (22) is connected at one of its ends (22a) to the second electrical conductor (32) and has a further, free end (22b). The electrical conductor (31, 32) are electrically insulated from one another, the second electrical conductor (32) surrounding the first electrical conductor (31). The metal body (20) is capacitively coupled to the second electrical conductor (32). A reduction in electromagnetic interference fields is realized thereby in a simple manner.