中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

118 records (took 0.024 seconds)

    Method and Apparatus of an Input Resistance of a Passive Mixer to Broaden the Input Matching Bandwidth of a Common Source-Gate LNA
    111.
    发明申请
    Method and Apparatus of an Input Resistance of a Passive Mixer to Broaden the Input Matching Bandwidth of a Common Source-Gate LNA 有权
    无源混频器的输入电阻的方法和装置，以扩大公共源极门LNA的输入匹配带宽

    公开(公告)号：US20140097894A1

    公开(公告)日：2014-04-10

    申请号：US14108312

    申请日：2013-12-16

    Applicant: Tensorcom, Inc.

    Inventor： Zaw Soe

    IPC: H03F3/387

    CPC classification number: H03F1/42 ,  H03D7/125 ,  H03D7/1441 ,  H03D7/1466 ,  H03D7/165 ,  H03F1/223 ,  H03F3/193 ,  H03F3/387 ,  H03F3/45071 ,  H03F3/45179 ,  H03F2200/108 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/492 ,  H03F2200/72 ,  H03F2200/75 ,  H04L27/38

    Abstract: A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

    Abstract translation: 引入并描述了以60GHz操作的共源共栅和公共栅极LNA。 对共源共栅源LNA进行模拟，以达到上部器件宽度与较低器件宽度的最佳比例。 共源共栅源LNA的电压输出转换为电流以馈送并将能量施加到混频器级。 这些输入电流信号将与电流相关联的能量直接施加到混频器中的开关电容器中，以最小化系统的总功耗。 LNA电容耦合到I和Q混频器中的混频器开关，并由正交振荡器产生的时钟使能和禁止。 然后，这些信号被差分放大器放大以产生和和差频谱。

    Method and Apparatus of a Crystal Oscillator with a Noiseless and Amplitude Based Start Up Control Loop
    112.
    发明申请
    Method and Apparatus of a Crystal Oscillator with a Noiseless and Amplitude Based Start Up Control Loop 有权
    具有无噪声和振幅的启动控制环的晶体振荡器的方法和装置

    公开(公告)号：US20140091869A1

    公开(公告)日：2014-04-03

    申请号：US13632173

    申请日：2012-10-01

    Applicant: TENSORCOM, INC.

    Inventor： KhongMeng Tham

    IPC: H03L5/00

    CPC classification number: H03B5/364 ,  H03B5/06 ,  H03B2200/0088 ,  H03B2200/0094 ,  H03B2201/031 ,  H03L5/00

    Abstract: A large gain is used to start up the oscillation of the crystal quickly. Once the oscillation starts, the amplitude is detected. A control circuit determines based on the measured amplitude to disable a low resistance path in the controlled switch array to reduce the applied gain below the power dissipation specification of the crystal. Another technique introduces a mixed-signal controlled power supply multi-path resistive array which tailors the maximum current to the crystal. A successive approximation register converts the amplitude into several partitions and enables/disables one of several power routing paths to the inverter of the oscillator. This allows a better match between the crystal selected by the customer and the on-chip drive circuitry to power up the oscillator without stressing the crystal. The “l/f” noise of the oscillator circuit is minimized by operating transistors in the triode region instead of the linear region.

    Abstract translation: 使用大的增益快速启动晶体振荡。 一旦振荡开始，就检测振幅。 控制电路基于测量的幅度来确定禁用受控开关阵列中的低电阻路径，以将施加的增益降低到低于晶体的功率耗散规格。 另一种技术引入了一种混合信号控制电源多路径电阻阵列，可以调整晶体的最大电流。 逐次逼近寄存器将振幅转换成几个分区，并使能/禁用振荡器的反相器的几个电源路由路径之一。 这允许由客户选择的晶体和片上驱动电路之间更好地匹配，以在不强调晶体的情况下加电振荡器。 通过在三极管区域中操作晶体管而不是线性区域来使振荡器电路的“l / f”噪声最小化。

    Differential source follower having 6dB gain with applications to WiGig baseband filters
    113.
    发明授权
    Differential source follower having 6dB gain with applications to WiGig baseband filters 有权
    具有6dB增益的差分源极跟随器应用于WiGig基带滤波器

    公开(公告)号：US08674755B2

    公开(公告)日：2014-03-18

    申请号：US13916535

    申请日：2013-06-12

    Applicant: Tensorcom, Inc.

    Inventor： Zaw Soe

    IPC: H03F3/45

    CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

    Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

    Abstract translation: 一种差分放大器，包括耦合在两个电源之间的第一上部装置和第一下部装置系列，以及耦合在两个电源之间的第二上部装置和第二下部装置。 第一直流电压使得第一上部装置和第二上部装置能够和第二直流电压调节第一下部装置和第二下部装置中的电流。 当AC信号补码耦合到第一下部装置和第二上部装置时，AC信号分量耦合到第一上部装置和第二下部装置。 单独的RC网络将AC信号耦合到其相应的设备。 分别在上部装置和下部装置之间形成第一和第二输出信号。 所有设备的通道类型相同。

    Differential Source Follower having 6dB Gain with Applications to WiGig Baseband Filters
    114.
    发明申请
    Differential Source Follower having 6dB Gain with Applications to WiGig Baseband Filters 有权
    差分源跟随器具有6dB增益，可应用于WiGig基带滤波器

    公开(公告)号：US20130285746A1

    公开(公告)日：2013-10-31

    申请号：US13916535

    申请日：2013-06-12

    Applicant: Tensorcom, Inc.

    Inventor： Zaw Soe

    IPC: H03F3/45

    CPC classification number: H03H11/1217 ,  H03F3/195 ,  H03F3/301 ,  H03F3/45179 ,  H03F3/505 ,  H03F2203/45528 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03H3/00

    Abstract: A differential amplifier comprising a first upper device and a first lower device series coupled between two power supplies and a second upper device and a second lower device series coupled between the two power supplies. A first DC voltage enables the first upper device and the second upper device and a second DC voltage regulates current flow in the first lower device and the second lower device. An AC signal component is coupled to the first upper device and the second lower device while the AC signal complement is coupled to the first lower device and the second upper device. Separate RC networks couple the AC signals to their respective device. A first and second output signal forms between the upper device and the lower device, respectively. All the devices are same channel type.

    Abstract translation: 一种差分放大器，包括耦合在两个电源之间的第一上部装置和第一下部装置系列，以及耦合在两个电源之间的第二上部装置和第二下部装置。 第一直流电压使得第一上部装置和第二上部装置能够和第二直流电压调节第一下部装置和第二下部装置中的电流。 当AC信号补码耦合到第一下部装置和第二上部装置时，AC信号分量耦合到第一上部装置和第二下部装置。 单独的RC网络将AC信号耦合到其相应的设备。 分别在上部装置和下部装置之间形成第一和第二输出信号。 所有设备的通道类型相同。

    METHOD AND APPARATUS FOR AN ACTIVE NEGATIVE-CAPACITOR CIRCUIT
    117.
    发明公开
    METHOD AND APPARATUS FOR AN ACTIVE NEGATIVE-CAPACITOR CIRCUIT 审中-公开
    方法和装置活性负的压缩电路

    公开(公告)号：EP2893637A1

    公开(公告)日：2015-07-15

    申请号：EP13832732.5

    申请日：2013-09-02

    Applicant: Tensorcom Inc.

    Inventor： DAI, Dai

    IPC: H03F3/45

    CPC classification number: H03M1/0818 ,  H03M1/0809 ,  H03M1/124 ,  H03M1/365

    Abstract: The differential output of a Programmable Gain Amplifier (PGA) is loaded by the input differential gate capacitance of a plurality of Analog to Digital convertors (ADC) comparators and the differential metal layer traces to interconnect these comparators to the PGA. The differential capacitive load presented to the PGA is quite large and reduces the bandwidth of this interconnect between the PGA and ADC. To overcome the performance degradation due to the differential capacitive load, an active negative-capacitor circuit cancels the effect of the large input capacitance of the ADC comparators. This cancelation extends the gain characteristics of the interconnect between the PGA's output and the inputs of the first stage of the comparators. The active negative-capacitance is comprised of a cross pair NMOS with a capacitor connecting their sources where each NMOS is biased by a current source.

Patent Agency Ranking