公开(公告)号：US20190027573A1

公开(公告)日：2019-01-24

申请号：US16038024

申请日：2018-07-17

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Petri Raisanen ,  Michael Eugene Givens

IPC: H01L29/51 ,  H01L21/02

Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.

公开(公告)号：US20180182597A1

公开(公告)日：2018-06-28

申请号：US15835272

申请日：2017-12-07

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: H01J37/32 ,  H01L21/311

CPC classification number: H01J37/32009 ,  C23F1/12 ,  C23G5/00 ,  H01L21/31116

Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.

公开(公告)号：US10002936B2

公开(公告)日：2018-06-19

申请号：US14919180

申请日：2015-10-21

Applicant: ASM IP Holding B.V.

Inventor： Suvi Haukka ,  Michael Givens ,  Eric Shero ,  Jerry Winkler ,  Petri Räisänen ,  Timo Asikainen ,  Chiyu Zhu ,  Jaakko Anttila

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/44 ,  H01L29/49 ,  C23C16/455 ,  H01L21/285 ,  C23C16/06 ,  C23C16/34 ,  H01L29/51

CPC classification number: H01L29/4966 ,  C23C16/06 ,  C23C16/34 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45531 ,  H01L21/28562 ,  H01L21/32051 ,  H01L29/517

Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.

公开(公告)号：US20180166255A1

公开(公告)日：2018-06-14

申请号：US15835212

申请日：2017-12-07

Applicant: ASM IP Holding B.V.

Inventor： Tom E. Blomberg ,  Varun Sharma ,  Suvi Haukka ,  Marko Tuominen ,  Chiyu Zhu

IPC: H01J37/32 ,  H01L21/311 ,  H01L21/3065

CPC classification number: C23F4/02 ,  C09K13/00 ,  C23F1/12 ,  H01J37/32009 ,  H01J37/3244 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/32135

Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.

公开(公告)号：US20180102276A1

公开(公告)日：2018-04-12

申请号：US15836547

申请日：2017-12-08

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu

IPC: H01L21/768 ,  H01L21/02

Abstract: A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor onto the substrate and pulsing an oxygen precursor onto a selective deposition surface. The method can be used to form an air gap to, for example, reduce a parasitic resistance of the semiconductor device.

公开(公告)号：US20170306480A1

公开(公告)日：2017-10-26

申请号：US15135333

申请日：2016-04-21

Applicant: ASM IP Holding B.V.

Inventor： Chiyu Zhu ,  Kiran Shrestha ,  Suvi Haukka

IPC: C23C16/38 ,  C23C16/455

CPC classification number: C23C16/38 ,  C23C16/45523 ,  C23C16/45553

Abstract: A method for depositing a metal film onto a substrate is disclosed. In particular, the method comprises pulsing a metal halide precursor onto the substrate and pulsing a decaborane precursor onto the substrate. A reaction between the metal halide precursor and the decaborane precursor forms a metal film, specifically a metal boride.