Abstract:
An integrated circuit (IC) chip includes a substrate of a piezo-electric material having a first resistivity coefficient associated with a first direction that is longitudinal to a first crystal axis and a second resistivity coefficient associated with a second direction that is transverse to the first crystal axis. The first and second resistivity coefficients have opposite signs. The IC chip also includes a first stress sensing element formed in the substrate and coupled to pass a first current therethrough. The first stress sensing element includes a first resistor aligned such that the major direction of current flow through the first resistor is in the first direction and a second resistor coupled in series with the first resistor and aligned such that the major direction of current flow through the second resistor is in the second direction. A ratio of the resistance of the second resistor to the resistance of the first resistor is equal to a value α, where α is equal to the ratio of the first resistivity coefficient to the second resistivity coefficient.
Abstract:
Disclosed examples include fractional frequency divider circuits, including a counter to provide phase shifted pulse output signals in response to counting of an adjustable integer number NK cycles of an input clock signal, an output circuit to provide an output clock signal having a first edge between first edges of the pulse output signals, as well as a delta-sigma modulator (DSM), clocked by the second pulse output signal to receive a first predetermined value and to provide a DSM output value, and a phase accumulator to receive a step input value representing a sum of the DSM output value and a second predetermined value. The phase accumulator provides a divisor input signal to the counter, and provides a phase adjustment value to the output circuit to control the position of the first edge of the output clock signal between the first edges of the pulse output signals.
Abstract:
A time slot assignment arrangement for ultralow power devices in a wireless communication network is disclosed. The time slot assigned to ultralow power device wakeup frame is identified as ultralow power timeslot using various indicators. The ultralow power timeslot is assigned as contention based timeslot allowing ultralow power devices in the wireless network to extend the interval for synchronizing with the network overcoming the short synchronization interval requirements of wireless communication network resulting in significant improvement in battery life by preserving the power needed for frequent synchronization with the wireless communication network.
Abstract:
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
Abstract:
A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module.
Abstract:
At least one tone is generated. An output signal is generated in response to an input signal and the at least one tone. The output signal is modulated. The input signal and the at least one tone are represented in the modulated output signal. The at least one tone is outside a bandwidth of the input signal as represented in the modulated output signal. The modulated output signal is amplified. The at least one tone in the amplified signal is attenuated after the amplifying.
Abstract:
A system is provided in which a set of modules each have a substrate on which is mounted a radio frequency (RF) transmitter and/or an RF receiver coupled to a near field communication (NFC) coupler located on the substrate. Each module has a housing that surrounds and encloses the substrate. The housing has a port region on a surface of the housing. Each module has a field confiner located between the NFC coupler and the port region on the housing configured to guide electromagnetic energy emanated from the NFC coupler through the port region to a port region of an adjacent module.
Abstract:
A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.
Abstract:
A dielectric waveguide may be manufactured by forming a set of parallel channels in a planar sheet that has a lower dielectric constant value. The set of channels is then filled with a material having a higher dielectric constant value. The planar sheet is sliced into a plurality of strips that each contain one or more of the channels.
Abstract:
A circuit includes an amplifier configured to amplify an input signal and generate an output signal. The circuit also includes a tuning network configured to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, where the at least one tunable capacitor includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure disposed over a control structure, where the control structure is configured to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.