公开(公告)号：WO1988000414A1

公开(公告)日：1988-01-14

申请号：PCT/US1987001334

申请日：1987-06-08

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  GAL, Laszlo, Volgyesi

IPC: H03K19/082

CPC classification number: H03K19/0826

Abstract: A three-state logic circuit comprising a logic gate on a semiconductor chip which includes first and second conductors (10h, 10i), respective resistors connected to the conductors (10e, 10f), terminals for receiving input signals, and transistors for generating complementary output signals on the first and second conductors by passing respective currents through the resistors as a logical function of the input signals with the output signals having high and low voltage levels VH and VL; a control circuit (12a, 12d) on the chip having a first terminal connected to the first conductor, a second terminal connected to the second conductor, and a control terminal for receiving a control signal; a switching circuit within the control circuit which responds to the control signal by passing identical control currents through the respective resistors and into the first and second terminals to thereby lower the voltage levels on both the first and second conductors by at least VH-VL; and first and second driver transistors (11a, 11b) on the chip and respectively connected to the first and second conductors which drive complementary large and small currents off the chip in response to the voltage levels VH and VL, and which drive no more than the small current off the chip in response to the lowered levels.

公开(公告)号：WO1988000393A1

公开(公告)日：1988-01-14

申请号：PCT/US1987001392

申请日：1987-06-15

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  GABUZDA, Paul, George

IPC: H01L23/36

CPC classification number: H01L23/467 ,  H01L23/3672 ,  H01L23/4006 ,  H01L2023/405 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A heat sink for adhesive attachment to an integrated circuit package has a base plate (2) with gapped areas dividing the plate into sectors. A series of radial fin elements (5) extend from the base plate except at the gapped areas where a bridging fin (5w) element spans the gap (10) to effectively help reduce the stresses caused by heat cycling and permit the adhesive bond to be relatively undisturbed.

Abstract translation: 用于粘合剂附接到集成电路封装的散热器具有基板（2），其具有将板分成扇区的间隙区域。 一系列径向翅片元件（5）从底板延伸，除了桥接翼（5w）元件跨过间隙（10）的间隙处，以有效地帮助减少由热循环引起的应力，并允许粘合剂粘结 相对不受干扰

公开(公告)号：WO1987006035A1

公开(公告)日：1987-10-08

申请号：PCT/US1987000592

申请日：1987-03-17

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  KIM, Dongsung, R. ,  KRONIES, Reinhard, K.

IPC: G06F11/10

CPC classification number: G06F11/10

Abstract: A parity cheking system for establishing integrity of data transfer on a wide bus. Each set of ''4'' bus lines of a multiple line bus is passed from a driver chip (21d-22nd) to a corresponding receiver chip (21r-22nr). An added parity driver chip (24dp) senses each corresponding bit line of each driver chip (21d-22nd) to develop a set of four parity signals (P0-P3) for comparison with corresponding parity signals (PE0-PE3) from each corresponding bit line of each one of a set of receiver chips (21r-22nr). Any discrepancy will generate a parity error signal.

公开(公告)号：WO1998007119A2

公开(公告)日：1998-02-19

申请号：PCT/US1997014048

申请日：1997-08-08

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  BARONE, Cosmo, Mark

IPC: G07F07/00

CPC classification number: G07F7/04 ,  G06Q20/042 ,  G06Q20/14 ,  G07F17/42 ,  G07F19/20

Abstract: Bills are paid electronically or checks may be dispensed from an automated teller machine (100). Identification information is received from the user of the ATM. A bill (500) is scanned to obtain any of a bill identification number, a bill payee, and a bill amount. The user is provided with a request to pay at least a portion of the bill. The automated teller machine (100) receives authorization to pay at least a portion of the bill amount and a financial institution is signaled to pay the bill accordingly. Alternatively, the automated teller machine receives instructions to dispense a check, generates signals which indicate that funds corresponding to the value of the check are to be released and prints and dispenses the check.

Abstract translation: 票据以电子方式支付，支票可以从自动取款机（100）分发。 从ATM的用户接收识别信息。 扫描票据（500）以获得票据识别号码，票据收款人和票据金额中的任何一个。 向用户提供支付账单的至少一部分的请求。 自动取款机（100）收到授权以支付账单金额的至少一部分，并且用信号通知金融机构以相应地支付账单。 或者，自动柜员机接收分配支票的指令，产生指示将要释放对应于支票的金额的资金并打印并分发支票的信号。

公开(公告)号：WO1997023832A1

公开(公告)日：1997-07-03

申请号：PCT/US1996020232

申请日：1996-12-20

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  NOGALES, Charles, Edward ,  SOOY, William, Glenn

IPC: G06F13/12

CPC classification number: G06F13/128

Abstract: The present invention is an apparatus for adapting transmissions between an industry standard data bus of a host computer (10) having a host memory (13) and a fibre channel (14) coupled between said host computer (10) and a peripheral storage subsystem (16) having at least one disk drive (17-20), which apparatus comprises an interface logic (28) coupled between the industry standard bus and a local bus (33, 34) of the apparatus; a buffer memory (30) coupled to the local bus (33, 34); a multiplexor/control device (35) coupled to the local bus (33, 34) and being disposed for transmitting therethrough address and data; a fibre channel controller (31) disposed for formatting header and data structures that meet fibre channel protocol, which controller is coupled to the multiplexor/control (35); a gigabit link module (32) disposed for converting the header and data structures from a parallel format to a serial format and being coupled between the fibre channel controller (31) and the fibre channel (14); a microprocessor (22) disposed for providing service requests from the host to read and write data from the host memory (13) to and from the peripheral storage subsystem (16) via the buffer memory (30), the microprocessor (22) is coupled to a processor bus (25, 26); and, a bus control device (27) coupled between the processor bus (25, 26) and the local bus (33, 34) for providing service requests of the interface logic (28), the fibre channel controller (31) and the microprocessor (22), and for arbitrating control of the local bus (33, 34).

Abstract translation: 本发明是一种用于在具有主机存储器（13）的主计算机（10）的工业标准数据总线与耦合在所述主计算机（10）和外围存储子系统（10）之间的光纤通道（14）之间进行传输的装置， 16）具有至少一个盘驱动器（17-20），该装置包括耦合在工业标准总线和设备的本地总线（33,34）之间的接口逻辑（28）; 耦合到所述本地总线（33,34）的缓冲存储器（30）; 耦合到所述局部总线（33,34）并被布置成用于传输其地址和数据的复用器/控制设备（35） 光纤通道控制器（31），用于格式化满足光纤通道协议的报头和数据结构，该控制器耦合到多路复用器/控制（35）; 千兆位链路模块（32），被设置用于将标题和数据结构从并行格式转换为串行格式并耦合在光纤通道控制器（31）和光纤通道（14）之间; 微处理器（22）被设置用于提供来自主机的服务请求，以经由缓冲存储器（30）从主机存储器（13）到外围存储子系统（16）读取和写入数据，微处理器（22）被耦合 到处理器总线（25,26）; 以及耦合在处理器总线（25,26）和本地总线（33,34）之间的总线控制设备（27），用于提供接口逻辑（28）的服务请求，光纤通道控制器（31）和微处理器 （22），并且用于对本地总线（33,34）的控制进行仲裁。

公开(公告)号：WO1996016517A1

公开(公告)日：1996-05-30

申请号：PCT/US1995015217

申请日：1995-11-20

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  ARIDAS, James ,  PERKINSON, Dennis, A. ,  SWEET, Nancy, L. ,  TROUT-JORDAN, Linda ,  WARDZINSKI, Gerald, J. ,  CULPEPPER, Judith, L. ,  GIESSUEBEL, Kathleen, A. ,  LIN, Yi ,  PENROD, Michael, H. ,  WOLFF, Karen

IPC: H04Q03/00

CPC classification number: H04Q3/0025 ,  H04Q3/0029 ,  H04Q2213/13504 ,  H04Q2213/13527 ,  H04Q2213/13545

Abstract: A platform for connecting to a CCS7 network for supporting concurrently running CCS related applications. Copies of the SUs flowing through the network are sent to the platform where the FISUs, LSSUs and MSUs are filtered to provide the desired SU type for each of the applications. The MSUs are filtered by MSU category and MSU type within category into groups of MSUs of particular interest to the applications, respectively. Linked lists of filter elements associated with the respective linksets of the CCS7 network perform the filtering by comparing category and type fields to the MSU categories and types to form the groups. Filter change data received at a user interface is utilized to modify the filters.

Abstract translation: 一个连接到CCS7网络的平台，用于支持同时运行的CCS相关应用程序。 流经网络的SU的副本被发送到FISU，LSSU和MSU被过滤以为每个应用提供期望的SU类型的平台。 MSU分别由MSU类别和MSU类型过滤到应用程序特别感兴趣的MSU组中。 与CCS7网络的各个链接集相关联的过滤元素的链接列表通过将类别和类型字段与MSU类别和类型进行比较来进行过滤，以形成组。 利用用户界面接收到的过滤器更改数据来修改过滤器。

公开(公告)号：WO1996014707A1

公开(公告)日：1996-05-17

申请号：PCT/US1995014596

申请日：1995-10-25

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  SMITH, Gerald, R. ,  REASONER, George, E., Jr. ,  EDWARDS, Daniel, R. ,  GROSSE, Debora, Y. ,  KIDD, Robert, C.

IPC: H04N01/32

CPC classification number: G06Q40/02 ,  H04N1/32101 ,  H04N2201/3226 ,  H04N2201/3274 ,  H04N2201/3278

Abstract: An electronic document-imaging arrangement which generates imaging-bits representing a given document and transfers these bits on a "per-document basis" to various successive electronic processing stages and, finally, to a data base storage means (SRM); this arrangement also including a tag stage to create tag bits unique for each such imaged document and transfer these tag bits with the imaging bits for each document to each such processing stage that handles the imaging bits, and finally to an SRM interface for final matching and removal of the tag bits.

Abstract translation: 一种电子文档成像装置，其产生表示给定文档的成像位，并且以“每个文档为基础”将这些位传送到各种连续的电子处理阶段，最后生成到数据库存储装置（SRM）; 这种布置还包括标签级，以创建针对每个这样的成像文档唯一的标签位，并将这些标签位与每个文档的成像位传送到处理成像位的每个处理阶段，最后到最终匹配的SRM接口， 删除标签位。

公开(公告)号：WO1996002882A1

公开(公告)日：1996-02-01

申请号：PCT/US1995008386

申请日：1995-06-30

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  DOLBY, Nigel, I. ,  GOESSLING, Thomas, R. ,  NAGLE, Timothy, E.

IPC: G06F09/44

CPC classification number: G06F17/50 ,  G06F2217/06 ,  G06F2217/08 ,  G06N5/022

Abstract: A generalized configuration expert system (16) for generating a complete, legal, and near-optimal configuration for any complex system consisting of multiple components is disclosed. The present invention allows a developer (10) to specify a configurator framework for solving a particular configuration problem. A user (26) then operates the customized configurator (16) to generate a configuration solution based on the user's requests and the system's requirements and constraints. The generalized configurator uses declaratively constructed graphs (24, 34) and multiple interacting packing engines (36). A two-level, bipartite, spreading activation graph (24, 34) is used as the knowledge representation of the components to be configured and their associated relationships. The invention dynamically manages the interaction of the multiple packer engines (36) to select the appropriate piece of the total configuration problem to work on at any point in time, while still taking into account the other packing problems. The invention provides the ability to declaratively define the constraints used by the packing engines to assure correct configuration results.

Abstract translation: 公开了一种用于为由多个部件组成的任何复杂系统生成完整的，合法的和接近最佳配置的通用配置专家系统（16）。 本发明允许开发者（10）指定用于解决特定配置问题的配置器框架。 用户（26）然后操作定制配置器（16）以基于用户的请求和系统的要求和约束来生成配置解决方案。 广义配置器使用声明式构造的图形（24,34）和多个相互作用的打包引擎（36）。 二级，二分，传播激活图（24,34）被用作要配置的组件及其相关关系的知识表示。 本发明动态地管理多个封隔器发动机（36）的相互作用，以在任何时间点选择合适的总配置问题，同时还考虑到其他包装问题。 本发明提供了声明性地定义包装引擎使用的约束以确保正确的配置结果的能力。

公开(公告)号：WO1995012823A1

公开(公告)日：1995-05-11

申请号：PCT/US1994010893

申请日：1994-09-27

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  FARMER, Michael, E. ,  SOHN, Stephen, M.

IPC: G01S07/298

CPC classification number: G06F1/03 ,  G01S7/298 ,  G06F2101/06

Abstract: A pseudo-code representation and a C language representation of a scan converter system whereby radar amplitude data specified in polar coordinates may be displayed on a computer monitor display controlled by rectangular coordinates is provided. The invention utilizes a look-up table that is built using a two-phase algorithm. The look-up table is set into an initial state after which a mapping process takes place in which all of the (x, y) coordinate values covering the display area are inversely projected to the nearest (r, theta ) coordinate values using trigonometric and aproximation procedures. Since more than one (x, y) value may map to the same (r, theta ) value, these values are linked together to form a patch (fig. 2). All of the (r, theta ) coordinates will not be hit in this mapping process. Therefore, a second phase of projection occurs. Each (r, theta ) coordinate not hit in the aforementioned inverse projection is now projected forward to an (x, y) coordinate using trigonometric and approximation procedures. Upon conclusion of the formation of the look-up table, each (r, theta ) value will have an associated patch of (x, y) values. The look-up table may now be addressed by r and theta . The associated patch contains the x and y coordinate values which are used to paint the display.

Abstract translation: 提供了扫描转换器系统的伪码表示和C语言表示，其中以极坐标指定的雷达幅度数据可以显示在由直角坐标控制的计算机监视器显示器上。 本发明利用了使用两相算法构建的查找表。 查找表被设置为初始状态，之后进行映射处理，其中使用三角法将覆盖显示区域的所有（x，y）坐标值反向投影到最近的（r，θ）坐标值， 近似程序。 由于多个（x，y）值可以映射到相同的（r，theta）值，所以这些值被链接在一起形成一个补丁（图2）。 在这个映射过程中，所有（r，θ）坐标都不会被击中。 因此，发生第二阶段的投影。 在上述反向投影中未命中的每个（r，θ）坐标现在使用三角和近似程序向前投影到（x，y）坐标。 在查找表的形成结束时，每个（r，θ）值将具有（x，y）值的相关补码。 现在可以通过r和θ来查找查找表。 相关补丁包含用于绘制显示的x和y坐标值。

公开(公告)号：WO1995008842A1

公开(公告)日：1995-03-30

申请号：PCT/US1994010552

申请日：1994-09-16

Applicant: UNISYS CORPORATION

Inventor： UNISYS CORPORATION ,  AKHAVAIN, Mohammad ,  PERHRM, Timothy, James

IPC: H01L21/50

CPC classification number: H01L21/50 ,  H01L23/10 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/16195 ,  H01L2924/3025

Abstract: An integrated circuit package (10) comprises a body (11) with a cavity (14), at least one integrated circuit chip (15) mounted in the cavity, and a lid (16) which has a novel laminated structure. A bottom layer (16a) of this laminated lid forms a fused metallurgical seal (21) with the package body around the cavity to thereby stop contaminants from entering the cavity; and this bottom layer has a predetermined small thickness which optimizes its ability to be fused to the body without cracks through the seal. By comparison, an overlying top layer (16b) of the lid has a large thickness which protects the bottom layer and the chips in the cavity from damage due to handling. During the packages fabrication, the thin bottom layer is fused by itself to the body of the package with a laser welding step; and after that step is completed, the thick top layer is attached to the thin bottom layer with an adhesive (16c).

Abstract translation: 集成电路封装（10）包括具有空腔（14）的本体（11），安装在空腔中的至少一个集成电路芯片（15）和具有新颖层压结构的盖子（16）。 该层压盖的底层（16a）形成熔融冶金密封件（21），封装主体围绕空腔形成，从而阻止污染物进入空腔; 并且该底层具有预定的小厚度，其优化其与身体熔合的能力而没有通过密封件的裂缝。 相比之下，盖的上部顶层（16b）具有较大的厚度，其保护底层和空腔中的碎屑免受由于处理造成的损坏。 在封装制造期间，薄的底层通过激光焊接步骤自身熔合到封装体上; 在完成该步骤之后，用粘合剂（16c）将厚的顶层附着到薄的底层。