公开(公告)号：EP0709890A1

公开(公告)日：1996-05-01

申请号：EP94830505.7

申请日：1994-10-27

Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Cacciola, Giovanna ,  Leonardi, Salvatore ,  Montalbano, Gianpiero

IPC: H01L27/06 ,  H01L27/092

CPC classification number: H01L27/0928 ,  H01L27/0623

Abstract: The invention relates to a control circuit for semiconductor devices which is formed on a substrate (1) doped by a first dopant type, the integrated circuit comprising a first epitaxial layer (2) grown on the substrate (1) and doped by the first dopant type, and an isolation well (3) doped by a second dopant type, the control circuit comprising at least a first control transistor (M1) formed in a first well (8) doped by the second dopant type and formed in the insulation well (3).
Thus, the control circuit comprises at least one N-channel MOS transistor accommodated within a well in direct contact with the isolation well to eliminate a buried layer that, in prior art arrangements, involved the presence of an undesired parasitic component.

Abstract translation: 本发明涉及一种用于半导体器件的控制电路，其形成在由第一掺杂剂类型掺杂的衬底（1）上，所述集成电路包括在衬底（1）上生长并由第一掺杂剂掺杂的第一外延层（2） 以及由第二掺杂剂类型掺杂的隔离阱（3），所述控制电路至少包括形成在由所述第二掺杂剂掺杂并形成在所述绝缘阱中的第一阱（8）中的第一控制晶体管（M1） 3）。 因此，控制电路包括容纳在与隔离阱直接接触的阱内的至少一个N沟道MOS晶体管，以消除在现有技术的布置中存在不期望的寄生元件的掩埋层。

公开(公告)号：EP0694957A1

公开(公告)日：1996-01-31

申请号：EP94830389.6

申请日：1994-07-29

Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Sorbello, Sebastiano, c/o Co. Ri.M.Me.

IPC: H01L21/00

CPC classification number: H01L21/67086 ,  H01L21/67075

Abstract: The equipment for the wet treatment of round semiconductor slices comprises a treatment tank containing a treatment liquid, a pair of parallel rollers with horizontal axis supported in a rotating manner near the bottom of the treatment tank and motor means for rotation of at least one of said rollers.
For treatment of the slices they are positioned on the rollers side by side with virtually horizontal axis parallel to the axis of the rollers.

Abstract translation: 用于湿式处理圆形半导体薄片的设备包括处理槽，该处理槽含有处理液体，一对平行的辊子，水平轴线以旋转的方式支撑在处理槽的底部附近，以及马达装置，用于使至少一个所述 辊。 为了处理切片，将它们并排定位在滚子上并且具有平行于滚子轴线的实际水平轴线。 $$

公开(公告)号：EP0587968B1

公开(公告)日：1996-01-03

申请号：EP92830506.9

申请日：1992-09-18

Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Zambrano, Raffaele ,  Palara, Sergio

IPC: H01L27/06

CPC classification number: H01L27/0617

公开(公告)号：EP0684549A1

公开(公告)日：1995-11-29

申请号：EP94830240.1

申请日：1994-05-23

Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Giacalone, Biagio ,  Catania, Vincenzo ,  Luzzi, Claudio ,  Matranga, Vincenzo

IPC: G06F7/60

CPC classification number: G06N7/04 ,  Y10S706/90

Abstract: Method of parallel processing of multiple inference rules (R) organized in fuzzy sets or logical functions of multiple fuzzy sets comprising membership functions (I') defined in a so-called universe of discourse (U) and said inference rules (R) being configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication and each preposition comprising at least one term (T) of comparison between membership functions (I') and a plurality of input data (I) and each term (T) being separated by logical operators (OL).
The method comprises at least one phase of calculation of the weight (Ω) of each term (T) of the antecedent part of each fuzzy logic inference rule as the greatest value of the intersection between the set of input data (I) and the corresponding membership functions (I').

Abstract translation: 在模糊集合或多个模糊集包含在话语中（U）和所述推理规则（R）的一个所谓的宇宙定义隶属函数（I“）的逻辑功能组织的多个推理规则（R）的并行处理方法被配置 基本上如IF-THEN与至少一个先行介词和至少一个随后的含义，并且每个介词包括隶属函数之间的比较中的至少一个术语（T）（I“）和输入数据（I）的多元的，每个术语的规则 （T）通过逻辑运算符（OL）分离。 该方法包括权重的每个术语的每个模糊逻辑推理规则作为置位输入数据（I）之间的交叉点的最大值的前事件部分（T）的（OMEGA）的计算中的至少一个相和对应的 隶属函数（I“）。

公开(公告)号：EP0680224A1

公开(公告)日：1995-11-02

申请号：EP94830196.5

申请日：1994-04-27

Applicant: CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO ,  SGS-THOMSON MICROELECTRONICS S.r.l.

Inventor： Mancuso, Massimo ,  Poluzzi, Rinaldo ,  Rizzotto, Gianguido

IPC: H04N9/64 ,  H04N5/21 ,  H04N5/44

CPC classification number: H04N7/012 ,  H03H2222/02 ,  H04N5/21 ,  H04N7/0132 ,  H04N9/646 ,  Y10S706/90

Abstract: A filter architecture for high-resolution video applications of the type comprising at least one filter block (3) having a plurality of digital inputs (Pi, X) which receive through an interface (2) components (U, V, Y) of a television signal and some outputs (NR) through which to take the result of a filtering operation for noise associated with the television signal also comprises in the filter block (3) at least one interpolator block connected to said inputs and operating with fuzzy logic to execute a television signal scanning conversion to be presented on additional outputs (SRC) of the filter block (3).

Abstract translation: 一种用于高分辨率视频应用的滤波器架构，其包括具有多个数字输入（Pi，X）的至少一个滤波器块（3），所述至少一个滤波器模块（3）通过接口（2）接收（2）组件（U，V，Y） 电视信号和一些输出（NR），通过该输出来获得与电视信号相关联的噪声的滤波操作的结果，还在滤波器块（3）中还包括连接到所述输入的至少一个内插器块，并以模糊逻辑运行以执行 在过滤块（3）的附加输出（SRC）上呈现电视信号扫描转换。

公开(公告)号：EP0655711A1

公开(公告)日：1995-05-31

申请号：EP93830483.9

申请日：1993-11-30

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l. ,  CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Mancuso,Massimo c/o SGS-THOMSONMICROELECTRONICS ,  Poluzzi, Rinaldo ,  Rizzotto, Gianguido

IPC: G06T5/00

CPC classification number: G06T5/002 ,  G06T5/20 ,  G06T2207/10016 ,  H03H2222/02

Abstract: A filter acting on digital image signals for apparatus of the video type comprises:

at least first and second circuit means (2) and (3) adapted to elect an image edge, each said circuit means comprising at least one inferential circuit (C1 and C2) operating on a fuzzy logic, which has at least first and second input terminals and at least one output terminal, and at least first and second comparison elements (S1,S2,S3,S4) each having first and second input terminals and at least one output terminal, said input terminals being intended for receiving discrete digital signals of an image.

The output terminals of the first and second comparison elements (S1 and S2) in the first circuit means (2) are respectively connected to the first and second input terminals of the inferential circuit included to said first circuit means, and the output terminals of the first and second comparison elements (S3 and S4) in the second circuit means (3) are respectively connected to the first and second input terminals of the inferential circuit included to said second circuit means.

Abstract translation: 一种作用于视频类型装置的数字图像信号的滤波器包括：适于选择图像边缘的至少第一和第二电路装置（2）和（3），每个所述电路装置包括至少一个推导电路（C1和C2 ），其具有至少具有第一和第二输入端子和至少一个输出端子的模糊逻辑，以及至少第一和第二比较元件（S1，S2，S3，S4），每个具有第一和第二输入端子并且至少具有第一和第二输入端子 一个输出端子，所述输入端子用于接收图像的离散数字信号。 第一电路装置（2）中的第一和第二比较元件（S1和S2）的输出端子分别连接到包括在所述第一电路装置中的推理电路的第一和第二输入端子，并且输出端子 第二电路装置（3）中的第一和第二比较元件（S3和S4）分别连接到包括在所述第二电路装置中的推理电路的第一和第二输入端子。

公开(公告)号：EP0608667A1

公开(公告)日：1994-08-03

申请号：EP93830034.0

申请日：1993-01-29

Applicant: SGS-THOMSON MICROELECTRONICS S.r.l. ,  CO.RI.M.ME. CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO

Inventor： Pulvirenti, Francesco ,  Gariboldi, Roberto

IPC: H03K17/687

CPC classification number: H03K17/0414 ,  H03K17/04123 ,  H03K17/687

Abstract: A drive circuit for a field-effect transistor (MFET1) which has a drain terminal connected to the positive pole (+Vcc) of the power supply and a source terminal connected to a load (OUT).
The circuit has circuit means for turning off the field-effect transistor (MFET1) which comprises a first transistor (M1) connected between the gate terminal of the field-effect transistor (MFET1) and the negative pole (GND) of the power supply.
Said first transistor (MFET1) is driven by an operational amplifier (M3,M4,MR1,MR2,MR3) which has inverting and non-inverting terminals connected to the gate and source terminals of the field-effect transistor (MFET1) respectively.

Abstract translation: 用于场效应晶体管（MFET1）的驱动电路，其具有连接到电源的正极（+ Vcc）的漏极端子和连接到负载（OUT）的源极端子。 电路具有用于截止场效应晶体管（MFET1）的电路装置，该场效应晶体管包括连接在场效应晶体管（MFET1）的栅极端子和电源的负极（GND）之间的第一晶体管（M1）。 所述第一晶体管（MFET1）由运算放大器（M3，M4，MR1，MR2，MR3）驱动，其运算放大器分别具有连接到场效应晶体管（MFET1）的栅极和源极端子的反相和非反相端子。

公开(公告)号：EP0589124A1

公开(公告)日：1994-03-30

申请号：EP92830514.3

申请日：1992-09-23

Applicant: CO.RI.M.ME.

Inventor： Rapisarda, Cirino

IPC: H01L21/32 ,  H01L21/76

CPC classification number: H01L21/76205 ,  H01L21/32

Abstract: A method for eliminating the bird's beak from selective oxidations of semiconductor electronic devices having a semiconductor substrate (1) which is covered by an oxide layer (2) covered, in turn, by a first layer (3) of nitride, and wherein at least one pit (7,11) is defined for growing an isolation region, comprises the sequential steps of,

selectively etching the oxide layer (2) within said pit (7) to define peripheral recesses (6,8) between the substrate (1) and the nitride;
occluding said recesses (6,8) with nitride; and
growing oxide in said pit (7) so as to form said isolation region contrasting the nitride portions (9,10) which occlude said recesses (6,8).

Abstract translation: 一种用于从半导体电子器件的选择性氧化消除具有半导体基板鸟嘴方法（1）所有其通过在氧化物层中的至少（2）覆盖，进而，由第一层（3）氮化物，和worin覆盖 一个凹坑（7.11），用于在隔离区域生长被定义，包括以下顺序的步骤，选择性地蚀刻所述衬底在所述凹坑内的氧化物层（2）（7）来定义周凹部（6.8）（1） 和氮化物; 闭塞所述凹部（6.8）与氮化物; 并且在所述坑生长氧化物（7），以便形成所述隔离区对比氮化物部分（9,10）哪个闭塞所述凹槽（6.8）。