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公开(公告)号:US11740416B2
公开(公告)日:2023-08-29
申请号:US17546314
申请日:2021-12-09
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Romain Coffy , Jean-Michel Riviere
IPC: G02B6/42
CPC classification number: G02B6/4239 , G02B6/4213 , G02B6/4274
Abstract: An optoelectronic element is located in a package. The package includes a first optical block and a second optical block that are attached to each other by a bonding layer. One of the first and second optical blocks is attached to lateral walls of the package by glue. The material of the bonding layer is configured to induce less stress to the first and second optical blocks than the glue.
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公开(公告)号:US20230268928A1
公开(公告)日:2023-08-24
申请号:US18112056
申请日:2023-02-21
Inventor: Nicolas MOENECLAEY , Laurent VACCARIELLO
IPC: H03M1/38 , G01J1/44 , G01J1/42 , H01L27/144
CPC classification number: H03M1/38 , G01J1/44 , G01J1/4204 , H01L27/1446 , H01L27/1443 , G01J2001/448 , G01J2001/446
Abstract: An ambient light sensor includes pixels arranged in an array. Each pixel includes a doped insulated well of a first type, a pinned photodiode in the well, a doped region of a second type arranged in the well, a transfer gate coupling the photodiode to said region, and a first circuit applying a first or second potential to the well. A successive approximation analog-to-digital converter of the sensor has a node connected to the doped regions of the pixels, a switch applying a third potential to the node, a comparator coupled to the node, and a second circuit receiving an output of the comparator and controlling the first circuits to selectively apply the first and second potentials. A sensor control circuit controls the gates and the first switch.
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公开(公告)号:US11703901B2
公开(公告)日:2023-07-18
申请号:US17737692
申请日:2022-05-05
Inventor: Jean Camiolo , Alexandre Pons
IPC: G05F1/575 , G01R19/165 , G05F3/18 , G06F1/26 , H03F3/45 , H03K3/0233 , G05F1/56
CPC classification number: G05F1/575 , G01R19/16528 , G05F1/56 , G05F3/185 , G06F1/266 , H03F3/45076 , H03K3/02337
Abstract: A first terminal receives a first DC voltage. A switch selectively couples the first terminal to a second terminal providing an output. A control circuit selectively actuates the switch in response to a comparison of the first DC voltage to a second DC voltage. A low-dropout (LDO) linear voltage regulator, connected between the first and third terminals, operates to provide the second DC voltage from the first DC voltage.
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公开(公告)号:US11675679B2
公开(公告)日:2023-06-13
申请号:US16787508
申请日:2020-02-11
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Jean Camiolo
CPC classification number: G06F11/221 , G01R31/50 , G06F1/26 , G06F13/382 , G06F2213/0042
Abstract: An apparatus is for testing a device to be supplied with power via USB Power Delivery (USB-PD). The apparatus includes at least one USB Type-C connector configured to be connected to the device to be supplied with power to be tested, the at least one USB Type-C connector including a power supply terminal. Processing circuitry of the apparatus is configured to verify that a voltage at the power supply terminal is lower than a first threshold, verify a role of the device, generate requests representative of power supply configurations supported by the role of the device, and verify compatibility of the power supply configurations supported by the device with standardized power supply configurations.
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公开(公告)号:US11664475B2
公开(公告)日:2023-05-30
申请号:US17090461
申请日:2020-11-05
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Karine Saxod , Nicolas Mastromauro
IPC: H01L31/14 , G01S7/484 , G01S7/4865 , H01L31/0203 , H01L33/52 , H01L31/18 , H01L33/00
CPC classification number: H01L31/143 , G01S7/484 , G01S7/4865 , H01L31/0203 , H01L31/18 , H01L33/005 , H01L33/52 , H01L2933/005
Abstract: A carrier substrate is configured to carry at least one electronic chip and includes a mounting front face. An encapsulating cover is mounted on the front face of the carrier substrate through a mounting. This mounting includes at least one seating surface through which the cover and the carrier substrate make contact. At least one adhesive bead is located elsewhere than the seating surface in order to securely fasten the encapsulation cover and the carrier substrate.
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公开(公告)号:US11663697B2
公开(公告)日:2023-05-30
申请号:US17165778
申请日:2021-02-02
Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
Inventor: Gregory Roffet , Stephane Drouard , Roger Monteith
IPC: G06T3/40 , G06T7/00 , G01S17/894
CPC classification number: G06T3/4038 , G01S17/894 , G06T7/97 , G06T2200/32 , G06T2207/10016
Abstract: A device for assembling at least two shots of a scene acquired by at least one sensor includes a memory and processing circuitry. The processing circuitry is configured to save, in the memory, a first data set contained in a first signal generated by each pixel of the sensor and indicative of a first shot of the scene, and a second data set contained in a second signal generated by each pixel of the sensor and indicative of a second shot of the scene. The processing circuitry is further configured to assemble the first and second shots on the basis of the content of the first and second data sets of a plurality of pixels in order to form a resulting scene.
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公开(公告)号:US11653441B2
公开(公告)日:2023-05-16
申请号:US16951695
申请日:2020-11-18
Inventor: Julien Didion , Thierry Lapergue
CPC classification number: H05K1/025 , H04B1/16 , H05K1/181 , H05K2201/09272 , H05K2201/09281 , H05K2201/10045 , H05K2201/10098
Abstract: A device includes a printed circuit board substrate, an antenna connected to the printed circuit board substrate, an amplifier connected to the printed circuit board substrate, and a matching track having a first end electrically connected to an input of the amplifier and a second end electrically connected to an output of the antenna. The matching track has an outgrowth that is symmetrical along a median axis of the outgrowth. The matching track is rectilinear and has a constant width over an initial part extending between the widening area and the first end. A median axis of the initial part and the median axis of the outgrowth form an angle comprised between 60 and 120°.
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公开(公告)号:US11650738B2
公开(公告)日:2023-05-16
申请号:US17111778
申请日:2020-12-04
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Gerald Briat , Stephane Marmey
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/0652 , G06F3/0659 , G06F3/0679
Abstract: The integrity of a memory is checked by: storing data representative of an operation to be executed in the memory; executing the operation; and erasing the data once the execution is complete.
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公开(公告)号:US20230145151A1
公开(公告)日:2023-05-11
申请号:US18052478
申请日:2022-11-03
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Laurent Simony
IPC: H04N25/709 , H02M3/155 , H04N25/77
CPC classification number: H04N25/709 , H02M3/155 , H04N25/77
Abstract: In accordance with an embodiment, a power supply circuit includes: a first transistor device comprising a first gate associated with a first transconductance and a second gate associated with a transconductance greater than the first transconductance; and a second transistor device including a third gate associated with a second transconductance and a fourth gate associated with a transconductance greater than the second transconductance. The second transistor device is configured to supply power to at least one load, the first and the third gates are controlled by a closed regulation loop, and the second and the fourth gates are controlled by a sampled reference voltage.
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公开(公告)号:US20230140705A1
公开(公告)日:2023-05-04
申请号:US17970327
申请日:2022-10-20
Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
Inventor: Younes BOUTALEB , Romain COFFY
IPC: H01L23/367 , H01L21/52 , H01L23/498
Abstract: The present description concerns an electronic device comprising an electronic chip and a package for protecting said chip, said package comprising: a substrate comprising an alternation of electrically-insulating layers and of thermally-conductive layers where at least one electrically-insulating layer comprises at least a thermally-conductive portion; and a cover made of a thermally-conductive material comprising at least one lateral portion arranged in at least one cavity formed from a first surface of said substrate.
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