Abstract:
This invention relates to apparatus and method for power management and especially to power management integrated circuits (PMICs). In one aspect the invention relates to a PMIC (102) having an internal non-volatile memory (NVM 115) for storing boot settings for the PMIC. The PMIC also has control circuitry (111) for detecting whether a source of boot settings is available, such as an NVM (202) external to the PMIC, and, if so, using any settings stored in the external source in preference to the relevant settings stored in the internal NVM. The external settings can thus override any internal settings, which is useful for fault diagnosis and/or development. In one aspect the PMIC may have programming circuitry (401) for automatically programming boot settings from an external source into the internal NVM (115).
Abstract:
This invention relates to power management integrated circuits (PMICs) and related methods. In one aspect a PMIC which is operable to provide a plurality of PMIC power states is arranged to provide a predetermined delay before a power state transition. The delay is applied after receipt by the PMIC control circuitry of a power state transition command. Applying a delay allows time for the system powered by the PMIC to perform any necessary shut-down procedures and terminate active processes before power is removed, preventing corruption of the system. The delay is preferably configurable. The PMIC may also be arranged to control power converters which are external to the PMIC. In another aspect the PMIC has translation circuitry for providing the control settings of one power block, e.g. power converter, with any necessary modifications to be used by another power block. This means that only one set of control settings needs to be updated to change the output of both power blocks simultaneously.
Abstract:
A micro-electrical-mechanical system (MEMS) transducer comprises a layer of dielectric material having an electrode formed in the layer of dielectric material.A region of the layer of the dielectric material is adapted to provide a leakage path which, in use, removes unwanted charge from the layer of dielectric material.
Abstract:
A real time clock apparatus (20) comprises a counter (23) which stores a count value, the count value representing a time signal. The counter (23) may be written, for example by a host processor (not shown), such that the time signal can be set to any desired value. The real time clock apparatus (20) comprises a check register (33) that stores a check value. The content of the check register (33) (i.e. the check value) is modified each time a write operation is performed on the counter (23). For example, the content of the check register (33) can be updated by a control signal (35) each time a write operation is performed on the counter (23). The check value stored in the check register (33) is used for determining whether a write operation performed on the counter (23) is an authorised write operation or an unauthorised write operation. The check value may be incremented each time a write operation is performed, replaced with a new random number each time a write operation is performed, or a combination of both.
Abstract:
A noise cancellation system for an audio system such as a mobile phone handset, or a wireless phone headset has a first input for receiving a first audio signal from one or more microphone positioned to receive ambient noise, and a second input for receiving a second audio signal from a microphone positioned to detect the user?s speech, as well as a third input for receiving a third audio signal for example representing the speech of a person to whom the user is talking. A first noise cancellation block receives the first audio signal and generates a first noise cancellation signal, and this is combined with the third audio signal to form a first audio output signal. A second noise cancellation block receives at least a part of the first audio signal and said second audio signal and applying noise cancellation to generate a second audio output signal.
Abstract:
An amplifier circuit comprises an amplifier for amplifying an input signal and outputting the amplified signal to an external device. A power supply provides a supply voltage to the amplifier. The nature or type of external device (for example line-load or headphones) is determined by measuring a parameter related to the supply voltage. The parameter may be the time taken for the supply voltage to fall or rise a predefined threshold value. Alternatively, the measured parameter may be a voltage drop or voltage rise over a predetermined period of time. Both of these parameters give an indication as to the rate of change of the supply voltage with time, which provides an indication of the nature of the load. Processing circuitry may be provided for calibrating the rate of change of the supply voltage with time, based on the input signal.
Abstract:
There is provided a noise cancellation system, comprising: a voice input, for receiving a wanted signal; a noise input for receiving a detected signal representative of ambient noise; a signal processor, for generating a noise cancellation signal for addition to the wanted signal, the signal processor having an adjustable gain; and control circuitry, for determining a relationship between levels of the wanted signal and the detected signal, and for controlling the adjustable gain on the basis of the determined relationship.
Abstract:
A multi-bit digital to analogue converter is implemented by a switched-capacitor arrangement in which a reservoir capacitor (Cf) accumulates charge representing the desired analogue output signal (Vout+/Vout-). An array of further capacitors (C0-CN) correspond in number at least to the number of data bits (D0-DN) to be converted. The capacitors (Cf, C0-CN) are selectively interconnected with one another and with reference voltage sources (Vmid, Vdd, Vss) in a repetitive sequence of phases including (i) a sampling phase (P2) in which said further capacitors are connected (S3, S4) to reference voltages selected in accordance with the values of said data bits, (ii) an equalisation phase (P6a) in which said further capacitors are connected (S2) in parallel with one another without connecting them in parallel with the first capacitor, followed by (iii) a transfer phase (P6b) in which the parallel connected further capacitors are connected (S1, S5) in parallel with the first capacitor. The equalisation phase masks nonlinearities arising in switches (S2) and thereby improves harmonic distortion.
Abstract:
Noise reduction circuitry for a communication apparatus can apply different noise reduction transfer functions, depending on whether a listening device is connected to the apparatus. If no listening device is connected, the noise reduction transfer function can be adapted for use with microphones (12) and speakers (28) that form an integral part of the communication apparatus, which may be a cellular telephone. If a listening device is connected, the noise reduction transfer function can be adapted for use with microphones (12) and speakers (28) that form a part of the listening device. This allows the noise reduction circuitry to provide improved noise reduction performance.
Abstract:
A DC-to-DC converter for using a single input supply to generate a plurality of power outputs at different voltages (Vout1, Vout2) using a single inductor (33) has an arrangement of switches (A - F) enabling the input voltage (Vin) to be connected across the inductor (33) in both the forward and reverse directions. This allows the inductor current to be increased or reduced rapidly if desired, enabling the converter to supply a high current to an output even if its voltage is close to the input voltage (Vin). This circuit may be used with a control regime in which power is supplied to an output during an inductor charge phase in which current flows from the input supply through the inductor (33) to the power output, followed by an inductor discharge phase in which current flows from ground through the inductor (33) to. the power output, the level of current in the inductor (33) at the end of the inductor discharge phase is stored, and, before the next inductor charge phase for the same output, a slew phase is provided in which the input supply is connected across the inductor in the forward or reverse direction, as appropriate, to bring the inductor current at the beginning of the inductor charge phase to be equal to the inductor current at the end of the previous inductor discharge phase for that power output. This arrangement helps to reduce crosstalk between power outputs, and to enable the converter to supply different.outputs having substantially different power requirements.