公开(公告)号：EP2656385A1

公开(公告)日：2013-10-30

申请号：EP10861039.5

申请日：2010-12-20

Applicant: Intel Corporation

Inventor： KAMGAING, Telesphor ,  RAO, Valluri

IPC: H01L27/02 ,  H01L25/18 ,  H04B1/44

CPC classification number: H04B1/08 ,  H01F17/0013 ,  H01F2017/002 ,  H01F2017/0086 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/16 ,  H01L24/48 ,  H01L25/16 ,  H01L28/10 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2924/09701 ,  H01L2924/1421 ,  H01L2924/14335 ,  H01L2924/19011 ,  H01L2924/19105 ,  H01L2924/30107

Abstract: Functionality of front-end module radio frequency (RF) devices is divided between a hybrid system on chip (SoC) that includes a digital processor and an RF integrated circuit device (DP-RFIC device), and a package substrate for the hybrid device. Methods of assembling include forming inductors and transformers integral to the package substrate and mounting the DP-RFIC device in proximity to the inductors and transformers.

公开(公告)号：EP4241383A1

公开(公告)日：2023-09-13

申请号：EP20960954.4

申请日：2020-11-03

Applicant: Intel Corporation

Inventor： THAKUR, Jayprakash ,  DEGANI, Ofir ,  KRONFELD, Ronen ,  RESHEF, Ehud ,  SUH, Seong-Youp, J. ,  SHOSHANA, Tal ,  MANN, Eytan ,  TAMRAKAR, Maruti ,  RAVI, Ashoke ,  CAMACHO PEREZ, Jose Rodrigo ,  HUUSARI, Timo Sakari ,  BOROKHOVICH, Eli ,  RUBIN, Amir ,  BENJAMIN, Ofer ,  YANG, Tae Young ,  SKINNER, Harry ,  LEE, Kwan Ho ,  LEE, Jaejin ,  HAN, Dong-Ho ,  GROSS, Shahar ,  SEGEV, Eran ,  KAMGAING, Telesphor

IPC: H04B1/50 ,  H04B1/00 ,  H04B1/44 ,  H01Q1/24

公开(公告)号：EP4213186A1

公开(公告)日：2023-07-19

申请号：EP22206306.7

申请日：2022-11-09

Applicant: INTEL Corporation

Inventor： STRONG, Veronica ,  KAMGAING, Telesphor ,  ALEKSOV, Aleksandar ,  DOGIAMIS, Georgios ,  RAWLINGS, Brandon ,  PRABHU GAUNKAR, Neelam

IPC: H01L21/48 ,  H01L23/15 ,  H01L23/498 ,  H01L23/538

Abstract: Embodiments disclosed herein include an electronic package that comprises a substrate with a first surface and a second surface opposite from the first surface. In an embodiment, the substrate comprises glass. In an embodiment, the electronic package further comprises an opening through the substrate from the first surface to the second surface, where the opening comprises a first end proximate to the first surface of the substrate, a second end proximate to the second surface of the substrate, and a middle region between the first end and the second end. In an embodiment, the middle region has a discontinuous slope at junctions with the first end and the second end.

公开(公告)号：EP4203009A1

公开(公告)日：2023-06-28

申请号：EP22206289.5

申请日：2022-11-09

Applicant: INTEL Corporation

Inventor： ALEKSOV, Aleksandar ,  KAMGAING, Telesphor ,  DOGIAMIS, Georgios ,  PRABHU GAUNKAR, Neelam ,  STRONG, Veronica ,  RAWLINGS, Brandon ,  COLLINS, Andrew ,  SAIN, Arghya ,  PANDI, Sivaseetharaman

IPC: H01L23/15 ,  H01L23/498 ,  H01L21/48

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a trace embedded in the substrate, where a width of the trace is less than a height of the trace. In an embodiment, the electronic package further comprises a first layer on the first surface of the substrate, where the first layer is a dielectric buildup film, and a second layer on the second surface of the substrate, where the second layer is the dielectric buildup film.

公开(公告)号：EP4202961A1

公开(公告)日：2023-06-28

申请号：EP22208283.6

申请日：2022-11-18

Applicant: INTEL Corporation

Inventor： KAMGAING, Telesphor ,  ALEKSOV, Aleksandar ,  RAWLINGS, Brandon ,  DOGIAMIS, Georgios C. ,  STRONG, Veronica ,  PRABHU GAUNKAR, Neelam

IPC: H01F17/00 ,  H01F41/04

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a substrate, where the substrate comprises glass. In an embodiment, a magnetic ring is embedded in the substrate. In an embodiment, a loop is around the magnetic ring. In an embodiment, the loop is conductive and comprises a first via through the substrate, a second via through the substrate, and a trace over a surface of the substrate, where the trace electrically couples the first via to the second via.

公开(公告)号：EP4201903A1

公开(公告)日：2023-06-28

申请号：EP22205195.5

申请日：2022-11-03

Applicant: INTEL Corporation

Inventor： DOGIAMIS, Georgios C. ,  KAMGAING, Telesphor ,  RAWLINGS, Brandon ,  PRABHU GAUNKAR, Neelam ,  STRONG, Veronica ,  ALEKSOV, Aleksandar

IPC: C03C15/00 ,  C03C17/06 ,  C03C17/36 ,  C03C23/00

Abstract: Embodiments disclosed herein include electronic packages and methods of forming such packages. In an embodiment, an electronic package comprises a core, where the core comprises glass. In an embodiment, a via opening is formed through the core. In an embodiment, the via opening has an aspect ratio (depth:width) that is approximately 5:1 or greater. In an embodiment, the electronic package further comprises a via in the via opening, where the via opening is fully filled.

公开(公告)号：EP4106100A1

公开(公告)日：2022-12-21

申请号：EP22173319.9

申请日：2022-05-13

Applicant: INTEL Corporation

Inventor： KAMGAING, Telesphor ,  PRABHU GAUNKAR, Neelam ,  DOGIAMIS, Georgios ,  SWAN, Johanna

IPC: H01P5/107 ,  H01Q9/04

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to contactless transmission within a package that combines radiating elements with vertical transitions in the package, in particular to a waveguide within a core of the package that is surrounded by a metal ring. A radiating element on one side of the substrate core and above the waveguide surrounded by the metal ring communicates with another radiating element on the other side of the substrate core and below the waveguide surrounded by the metal ring. Other embodiments may be described and/or claimed.

公开(公告)号：EP4105983A1

公开(公告)日：2022-12-21

申请号：EP22170162.6

申请日：2022-04-27

Applicant: INTEL Corporation

Inventor： KAMGAING, Telesphor ,  SWAN, Johanna M.

IPC: H01L23/15 ,  H01L23/498 ,  H01L23/538

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to via structures and/or planar structures within a glass core of a substrate to facilitate high-speed signaling with a die coupled with the substrate. In embodiments, the substrate may be coupled with an interposer to enable high-speed signaling between a compute die (or tile) and a storage die (or tile) that may be remote to the substrate. Other embodiments may be described and/or claimed.

公开(公告)号：EP4084066A1

公开(公告)日：2022-11-02

申请号：EP22162574.2

申请日：2022-03-16

Applicant: INTEL Corporation

Inventor： SHARMA, Abhishek A, ,  GOMES, Wilfred ,  KAMGAING, Telesphor

IPC: H01L23/528 ,  H01L23/00

Abstract: Embodiments of the present disclosure are based on using transistors with back-side contacts. Such transistors enable back-side power delivery to IC components (e.g., transistors, etc.) of an IC structure, which may be more advantageous than front-side power delivery in some implementations. Embodiments of the present disclosure are further based on recognition that using a glass support structure at the front side of an IC structure with back-side power delivery may advantageously reduce parasitic effects in the IC structure, e.g., compared to using a silicon-based support structure at the front.

公开(公告)号：EP3736863A1

公开(公告)日：2020-11-11

申请号：EP20163008.4

申请日：2020-03-13

Applicant: INTEL Corporation

Inventor： YONG, Khang Choong ,  GOH, Eng Huat ,  LIM, Min Suet ,  SANKMAN, Robert ,  KAMGAING, Telesphor ,  SONG, Wil Choon ,  KOH, Boon Ping

IPC: H01L29/06 ,  H01L25/065 ,  H01L27/12

Abstract: Embodiments disclose electronic packages with a die assembly and methods of forming such electronic packages. In an embodiment, a die assembly comprises a first die and a second die laterally adjacent to the first die. In an embodiment, the first die and the second die each comprise a first semiconductor layer, an insulator layer over the first semiconductor layer, and a second semiconductor layer over the insulator layer. In an embodiment, a cavity is disposed through the second semiconductor layer. In an embodiment, the die assembly further comprises a bridge substrate that electrically couples the first die to the second die, where the bridge is positioned in the cavity of the first die and the cavity of the second die.