公开(公告)号：US20140334522A1

公开(公告)日：2014-11-13

申请号：US13892600

申请日：2013-05-13

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Steffen Thiele

IPC: H01L27/16 ,  G01K7/01

CPC classification number: H01L27/16 ,  G01K7/01

Abstract: A power transistor has a semiconductor body with a bottom side and top side spaced distant from the bottom side in a vertical direction. The semiconductor body includes a plurality of transistor cells, a source zone of a first conduction type, a body zone of a second conduction type, a drift zone of the first conduction type, a drain zone, and a temperature sensor diode having a pn-junction between an n-doped cathode zone and a p-doped anode zone. The power transistor also has a drain contact terminal on the top side, a source contact terminal on the bottom side, a gate contact terminal, and a temperature sense contact terminal on the top side. Depending on the first and second conduction types the anode or cathode zone is electrically connected to the source contact terminal and the other diode zone is electrically connected to the temperature sense contact terminal.

Abstract translation: 功率晶体管具有半导体本体，其具有在垂直方向上与底侧隔开的底侧和顶侧。 半导体本体包括多个晶体管单元，第一导电类型的源极区，第二导电类型的体区，第一导电类型的漂移区，漏极区和具有pn- n掺杂阴极区和p掺杂阳极区之间的结。 功率晶体管也在顶侧具有漏极接触端子，底侧的源极接触端子，栅极接触端子和顶侧的温度感测端子。 根据第一和第二导电类型，阳极或阴极区域电连接到源极接触端子，而另一个二极管区域电连接到温度检测接触端子。

公开(公告)号：US20140264580A1

公开(公告)日：2014-09-18

申请号：US13828894

申请日：2013-03-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4983 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7818 ,  H01L29/7824 ,  H01L29/7835

Abstract: A semiconductor device comprises a transistor. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode being adjacent to the body region. The body region, the drift zone, the source region and the drain region are disposed in a first semiconductor layer having a first main surface. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The transistor further comprises a drift control region arranged adjacent to the drift zone, the drift control region being disposed over the first main surface.

Abstract translation: 半导体器件包括晶体管。 晶体管包括源区域，漏极区域，体区域，漂移区域和与身体区域相邻的栅电极。 体区，漂移区，源区和漏区设置在具有第一主表面的第一半导体层中。 主体区域和漂移区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于第一主表面。 所述晶体管还包括与所述漂移区相邻布置的漂移控制区域，所述漂移控制区域设置在所述第一主表面上。

公开(公告)号：US20140209905A1

公开(公告)日：2014-07-31

申请号：US13754240

申请日：2013-01-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Andreas Meiser ,  Markus Zundel ,  Steffen Thiele

IPC: H01L23/544 ,  H01L21/762 ,  H01L27/088

CPC classification number: H01L23/544 ,  H01L21/76224 ,  H01L21/823481 ,  H01L27/088 ,  H01L29/0696 ,  H01L29/7813 ,  H01L29/7815 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit including a semiconductor device has a power component including a plurality of trenches in a cell array, the plurality of trenches running in a first direction, and a sensor component integrated into the cell array of the power component and including a sensor cell having an area which is smaller than an area of the cell array of the power component. The integrated circuit further includes isolation trenches disposed between the sensor component and the power component, an insulating material being disposed in the isolation trenches. The isolation trenches run in a second direction that is different from the first direction.

Abstract translation: 包括半导体器件的集成电路具有包括单元阵列中的多个沟槽的功率分量，沿第一方向运行的多个沟槽和集成到功率组件的单元阵列中的传感器组件，并且包括具有 小于电力部件的电池阵列的面积的区域。 集成电路还包括设置在传感器部件和功率部件之间的隔离沟槽，绝缘材料设置在隔离沟槽中。 隔离沟槽沿与第一方向不同的第二方向延伸。

公开(公告)号：US08710575B1

公开(公告)日：2014-04-29

申请号：US13754997

申请日：2013-01-31

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Werner Schwetlick

IPC: H01L29/788 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423

CPC classification number: H01L29/66825 ,  G11C16/0425 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/66787 ,  H01L29/7883 ,  H01L29/7889

Abstract: A semiconductor device is formed in a semiconductor substrate comprising a first main surface and includes a control gate disposed in a lower portion of a first trench formed in the first main surface, a floating gate disposed in the first trench above the control gate and insulated from the control gate, a source region of a first conductivity type, a body region of a second conductivity type, and a drain region of the first conductivity type.

Abstract translation: 半导体器件形成在包括第一主表面的半导体衬底中，并且包括设置在形成在第一主表面中的第一沟槽的下部的控制栅极，设置在控制栅极上方的第一沟槽中的浮置栅极 控制栅极，第一导电类型的源极区域，第二导电类型的体区域和第一导电类型的漏极区域。

公开(公告)号：US11069782B2

公开(公告)日：2021-07-20

申请号：US16601921

申请日：2019-10-15

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Oliver Haeberlen

IPC: H01L29/40 ,  H01L21/3115 ,  H01L29/417 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10

Abstract: A semiconductor device includes a transistor in a semiconductor body having a main surface. The transistor includes a source region; a drain region; a body region; a drift zone; a gate electrode at the body region, the body region and the drift zone being disposed along a first direction between the source region and the drain region, and the first direction being parallel to the main surface; a field plate disposed in each of a plurality of field plate trenches, each of the field plate trenches having a longitudinal axis extending along the first direction; and a field dielectric layer between the field plate and the drift zone, a thickness of the field dielectric layer at a bottom of each of the field plate trenches gradually increases along the first direction, the thickness being measured along a depth direction of the plurality of field plate trenches.

公开(公告)号：US11031494B2

公开(公告)日：2021-06-08

申请号：US16280775

申请日：2019-02-20

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser

IPC: H01L29/78 ,  H01L21/765 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/47 ,  H01L29/739 ,  H01L29/66 ,  H01L21/04 ,  H01L29/16

Abstract: A semiconductor device includes a trench structure extending from a first surface into a semiconductor body composed of silicon carbide. The trench structure includes an electrode and between the electrode and the first surface a gate electrode. A shielding region adjoining the electrode forms a first pn junction with a drift structure formed in the semiconductor body. A Schottky contact is formed between the drift structure and a first contact structure.

公开(公告)号：US11011606B2

公开(公告)日：2021-05-18

申请号：US16590714

申请日：2019-10-02

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC: H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/808 ,  H01L29/739 ,  H01L29/40 ,  H01L29/423 ,  H01L21/308 ,  H01L21/31 ,  H01L21/04 ,  H01L21/311 ,  H01L21/426 ,  H01L21/02 ,  H01L21/033

Abstract: A silicon carbide substrate has a trench extending from a main surface of the silicon carbide substrate into the silicon carbide substrate. The trench has a trench width at a trench bottom. A shielding region is formed in the silicon carbide substrate. The shielding region extends along the trench bottom. In at least one doping plane extending approximately parallel to the trench bottom, a dopant concentration in the shielding region over a lateral first width deviates by not more than 10% from a maximum value of the dopant concentration. The first width is less than the trench width and is at least 30% of the trench width.

公开(公告)号：US10985245B2

公开(公告)日：2021-04-20

申请号：US16220693

申请日：2018-12-14

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Christian Kampen

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/78 ,  H01L29/423

Abstract: The disclosure relates to a semiconductor device including a first planar field effect transistor cell and a second planar field effect transistor cell. The first planar field effect transistor cell and the second planar field effect transistor cell are electrically connected in parallel and each include a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. A gate electrode of the first field effect transistor cell is electrically connected to a source terminal, and a gate electrode of the second field effect transistor cell is connected to a gate terminal that is electrically isolated from the source terminal.

公开(公告)号：US10903322B2

公开(公告)日：2021-01-26

申请号：US16193161

申请日：2018-11-16

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Caspar Leendertz ,  Anton Mauder

IPC: H01L29/40 ,  H01L29/423 ,  H01L29/16 ,  H01L29/872 ,  H01L29/78

Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.

公开(公告)号：US20200161433A1

公开(公告)日：2020-05-21

申请号：US16354973

申请日：2019-03-15

Applicant: Infineon Technologies AG

Inventor： Caspar Leendertz ,  Romain Esteve ,  Anton Mauder ,  Andreas Meiser ,  Bernd Zippelius

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66

Abstract: Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.