公开(公告)号：WO2010065413A2

公开(公告)日：2010-06-10

申请号：PCT/US2009/065892

申请日：2009-11-25

Applicant: QUALCOMM INCORPORATED ,  JAYARAMAN, Satya ,  ABHYANKAR, Sachin ,  JONG, Alex Kwang-Ho ,  HIGGINS, Richard Alfred

Inventor： JAYARAMAN, Satya ,  ABHYANKAR, Sachin ,  JONG, Alex Kwang-Ho ,  HIGGINS, Richard Alfred

IPC: G06F11/36

CPC classification number: G06F11/3466 ,  G06F11/3476 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/885

Abstract: A dynamic performance profiler is operable to receive, in substantially real-time, raw performance data from a testing platform. A software-based image is executing on a target hardware platform (e.g., either simulated or actual) on the testing platform, and the testing platform monitors such execution to generate corresponding raw performance data, which is communicated, in substantially real-time, as it is generated during execution of the software-based image to a dynamic profiler. The dynamic profiler may be configured to archive select portions of the received raw performance data to data storage. As the raw performance data is received, the dynamic profiler analyzes the data to determine whether the performance of the software-based image on the target hardware platform violates a predefined performance constraint. When the performance constraint is violated, the dynamic profiler archives a portion of the received raw performance.

Abstract translation: 动态性能分析器可操作以基本上实时地从测试平台接收原始性能数据。 基于软件的图像在测试平台上的目标硬件平台（例如，模拟或实际）上执行，并且测试平台监视这样的执行以生成相应的原始性能数据，其基本上实时地传达为 它是在将基于软件的图像执行到动态分析器时生成的。 动态分析器可以被配置为将所接收的原始性能数据的选择部分归档到数据存储。 当接收到原始性能数据时，动态分析器分析数据，以确定目标硬件平台上的基于软件的映像的性能是否违反预定义的性能约束。 当违反性能约束时，动态分析器归档接收的原始性能的一部分。

公开(公告)号：WO2009022239A3

公开(公告)日：2009-12-30

申请号：PCT/IB2008003292

申请日：2008-03-26

Applicant: ACUMEM AB ,  VESTERLUND MAGNUS ,  NILSSON MATS ,  PETTERSON MIKAEL ,  HAGERSTEN ERIK ,  ZEFFER HAKAN ,  BERG ERIK

Inventor： VESTERLUND MAGNUS ,  NILSSON MATS ,  PETTERSON MIKAEL ,  HAGERSTEN ERIK ,  ZEFFER HAKAN ,  BERG ERIK

IPC: G06F13/00

CPC classification number: G06F11/3447 ,  G06F11/3466 ,  G06F2201/88 ,  G06F2201/885

Abstract: A system for, method of and computer program product captures performance- characteristic data from the execution of a program and models system performance based on that data. Performance-characterization data based on easily captured reuse distance metrics is targeted, defined as the total number of memory references between two accesses to the same piece of data. Methods for efficiently capturing this kind of metrics are described. These data can be refined into easily interpreted performance metrics, such as performance data related to caches with LRU replacement and random replacement strategies in combination with fully associative as well as limited associativity cache organizations. Methods for assessing cache utilization as well as parallel execution are covered.

Abstract translation: 系统，方法和计算机程序产品从执行程序捕获性能特征数据，并根据该数据对系统性能进行建模。 基于容易捕获的复用距离度量的性能表征数据被定义为两次访问同一数据块之间的存储器引用的总数。 描述有效捕获这种度量的方法。 这些数据可以被简化为易于解释的性能指标，例如与具有LRU替换的缓存和随机替换策略相关联的性能数据以及完全关联以及有限关联缓存组织。 涵盖了评估缓存利用率和并行执行的方法。

公开(公告)号：WO2009110953A2

公开(公告)日：2009-09-11

申请号：PCT/US2009000283

申请日：2009-02-13

Applicant: EVIDENT SOFTWARE INC ,  CLARK JOHN M ,  FRENKIEL SCOTT T ,  CHEN CHING-CHEN ,  HO IVAN C ,  JEFFERY DONALD C

Inventor： CLARK JOHN M ,  FRENKIEL SCOTT T ,  CHEN CHING-CHEN ,  HO IVAN C ,  JEFFERY DONALD C

IPC: G06F15/16

CPC classification number: G06F11/3404 ,  G06F11/3409 ,  G06F2201/815 ,  G06F2201/865 ,  G06F2201/875 ,  G06F2201/88 ,  G06F2201/885 ,  H04L41/142 ,  H04L41/5009 ,  H04L43/024 ,  H04L43/0847

Abstract: A method and system for metering and analyzing usage and performance data of virtualized compute and network infrastructures is disclosed. The processing functions of the metered data are divided into 'processing units' that are configured to execute on a server (or plurality of interconnected servers). Each processing unit receives input from an upstream processing unit, and processes the metered data to produce output for a downstream processing unit. The types of processing units, as well as the order of the processing units is user-configurable (e.g. via XML file), thus eliminating the need to modify source code of the data processing application itself, thereby saving considerable time, money, and development resources required to manage the virtualized compute and network infrastructure.

Abstract translation: 公开了一种用于计量和分析虚拟计算和网络基础设施的使用和性能数据的方法和系统。 计量数据的处理功能被分成配置为在服务器（或多个互连的服务器）上执行的“处理单元”。 每个处理单元接收来自上游处理单元的输入，并处理该计量数据以产生下游处理单元的输出。 处理单元的类型以及处理单元的顺序是用户可配置的（例如，通过XML文件），因此不需要修改数据处理应用程序本身的源代码，从而节省了大量的时间，金钱和开发 管理虚拟化计算和网络基础架构所需的资源。

公开(公告)号：WO2009058412A1

公开(公告)日：2009-05-07

申请号：PCT/US2008/055896

申请日：2008-03-05

Applicant: NEC LABORATORIES AMERICA, INC.

Inventor： CHEN, Haifeng ,  JIANG, Guofei ,  YOSHIHIRA, Kenji ,  ZHANG, Hui ,  MENG, Xiaoqiao

IPC: G06F17/00 ,  G06F19/00

CPC classification number: G06F9/44505 ,  G06F11/3409 ,  G06F11/3447 ,  G06F11/3452 ,  G06F2201/885

Abstract: A system and method for optimizing system performance includes applying (160) sampling based optimization to identify optimal configurations of a computing system by selecting (162) a number of configuration samples and evaluating (166) system performance based on the samples. Based on feedback of evaluated samples, a location of an optimal configuration is inferred (170). Additional samples are generated (176) towards the location of the inferred optimal configuration to further optimize a system configuration.

Abstract translation: 用于优化系统性能的系统和方法包括通过基于样本选择（162）多个配置样本和评估（166）系统性能来应用（160）基于抽样的优化来识别计算系统的最佳配置。 基于评估样本的反馈，推断最佳配置的位置（170）。 生成附加样本（176）朝向推断的最佳配置的位置，以进一步优化系统配置。

公开(公告)号：WO2008058292A3

公开(公告)日：2008-10-02

申请号：PCT/US2007084365

申请日：2007-11-09

Applicant: ACUMEM AB ,  BERG ERIK ,  HAGERSTEN ERIK ,  ZEFFER HAKAN ,  VESTERLUND MAGNUS ,  NILSSON MATS

Inventor： BERG ERIK ,  HAGERSTEN ERIK ,  ZEFFER HAKAN ,  VESTERLUND MAGNUS ,  NILSSON MATS

IPC: G06F9/45 ,  G06F9/44 ,  G06F12/00

CPC classification number: G06F11/3409 ,  G06F11/3452 ,  G06F11/3495 ,  G06F2201/86 ,  G06F2201/88 ,  G06F2201/885

Abstract: A system for, method of and computer program product captures performance characteristic data from the execution of a program and models system performance based on that data. Performance-characterization data (140) based on easily captured reuse distance metric is targeted, defined as the total number of memory references (230) between two accesses to the same piece of data (240). Methods for efficiently capturing this kind of metrics are described. These data can be refined into easily interpreted performance metrics, such as performance data related to caches with LRU replacement and random replacement strategies in combination with fully associative as well as limited associativity cache organaziations (330). Methods for assesing cache utilization as well as parallel execution are covered.

Abstract translation: 系统，方法和计算机程序产品从执行程序中捕获性能特征数据，并根据该数据对系统性能进行建模。 基于容易捕获的重用距离度量的性能特征数据（140）被定义为在对相同数据（240）的两次访问之间的存储器引用的总数（230）。 描述有效捕获这种度量的方法。 这些数据可以被简化为易于解释的性能指标，例如与具有LRU替换的缓存和随机替换策略相关联的完整关联以及有限关联高速缓存组织的性能数据（330）。 涵盖缓存利用率以及并行执行的方法。

公开(公告)号：WO2006028721A3

公开(公告)日：2007-07-12

申请号：PCT/US2005030266

申请日：2005-08-25

Applicant: CROSSROADS SYS INC ,  EWING DAVID B ,  MARTINDALE RICK A

Inventor： EWING DAVID B ,  MARTINDALE RICK A

IPC: G06F17/30

CPC classification number: H04L67/125 ,  G06F11/3409 ,  G06F11/3495 ,  G06F17/30306 ,  G06F2201/80 ,  G06F2201/81 ,  G06F2201/865 ,  G06F2201/885 ,  Y10S707/99931 ,  Y10S707/99942 ,  Y10S707/99943

Abstract: One embodiment includes a system for application-layer monitoring of communication between one or more database clients and one or more database servers. The system includes one or more decoders residing at a decoding layer above a network layer. The decoders reside at a first network location between one or more database clients residing at one or more second network locations and one or more database servers residing at one or more third network locations. The decoders receive database messages communicated from the database clients and intended for the database servers and database messages communicated from the database servers and intended for the database clients, decode the database messages, and extract query-language statements from the database messages. The system also includes a monitoring application residing at an application layer above the decoding layer. The monitoring application resides at the first network location. The monitoring application receives query-language statements extracted at the decoders and records observations on the database messages based on the query-language statements extracted at the decoders.

Abstract translation: 一个实施例包括用于应用层监视一个或多个数据库客户端与一个或多个数据库服务器之间的通信的系统。 该系统包括位于网络层上方的解码层的一个或多个解码器。 解码器驻留在驻留在一个或多个第二网络位置的一个或多个数据库客户端和驻留在一个或多个第三网络位置的一个或多个数据库服务器之间的第一网络位置。 解码器接收从数据库客户端传送的数据库消息，用于从数据库服务器传送的数据库服务器和数据库消息，用于数据库客户端，解码数据库消息，以及从数据库消息中提取查询语言语句。 该系统还包括驻留在解码层之上的应用层的监视应用。 监控应用程序位于第一个网络位置。 监控应用程序接收在解码器处提取的查询语言语句，并根据解码器中提取的查询语言语句记录数据库消息的观察结果。

公开(公告)号：WO2005066791A1

公开(公告)日：2005-07-21

申请号：PCT/US2004/043349

申请日：2004-12-24

Applicant: INTEL CORPORATION ,  SUBRAMONEY, Sreevinas ,  HUDSON, Richard ,  SERRANO, Mauricio ,  ADL-TABATABAI, Ali-Reza

Inventor： SUBRAMONEY, Sreevinas ,  HUDSON, Richard ,  SERRANO, Mauricio ,  ADL-TABATABAI, Ali-Reza

IPC: G06F12/02

CPC classification number: G06F11/348 ,  G06F12/0253 ,  G06F12/0269 ,  G06F2201/88 ,  G06F2201/885 ,  Y10S707/99957

Abstract: Techniques are described for optimizing memory management in a processor system. The techniques may be implemented on processors that include on-chip performance monitoring and on systems where an external performance monitor is coupled to a processor. Processors that include a Performance Monitoring Unit (PMU) are examples. The PMU may store data on read and write cache misses, as well as data on translation lookaside buffer (TLB) misses. The data from the PMU is used to determine if any memory regions within a memory heap are delinquent memory regions, i.e., regions exhibiting high numbers of memory problems or stalls. If delinquent memory regions are found, the memory manager, such as a garbage collection routine, can efficiently optimize memory performance as well as the mutators performance by improving the layout of objects in the heap. In this way, memory management routines may be focused based on dynamic and real-time memory performance data.

Abstract translation: 描述了用于优化处理器系统中的存储器管理的技术。 这些技术可以在包括片上性能监视的处理器以及外部性能监视器耦合到处理器的系统上实现。 包括性能监控单元（PMU）的处理器就是例子。 PMU可以将数据存储在读取和写入高速缓存未命中，以及翻译后备缓冲区（TLB）未命中的数据。 来自PMU的数据用于确定存储器堆中的任何存储器区域是否是过期存储器区域，即表现出大量存储器问题或失速的区域。 如果发现存在不正当的内存区域，诸如垃圾收集例程的存储器管理器可以通过改进堆中对象的布局来有效地优化存储器性能以及突变器的性能。 以这种方式，可以基于动态和实时存储器性能数据来集中存储器管理例程。

公开(公告)号：WO2005065205A2

公开(公告)日：2005-07-21

申请号：PCT/US2004/042313

申请日：2004-12-15

Applicant: MICRON TECHNOLOGY, INC. ,  JEDDELOH, Joseph, M.

Inventor： JEDDELOH, Joseph, M.

IPC: G06F12/00 ,  G06F13/16

CPC classification number: G06F13/161 ,  G06F11/3409 ,  G06F11/3466 ,  G06F11/348 ,  G06F11/3485 ,  G06F11/349 ,  G06F13/1694 ,  G06F2201/88 ,  G06F2201/885

Abstract: A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics-for example, page hit rate, number or percentage of prefetch hits, cache hit rate or percentage, read rate, number of read requests, write rate, number of write requests, rate or percentage of memory bus utilization, local hub request rate or number, and/or remote hub request rate or number.

Abstract translation: 存储器模块包括耦合到多个存储器件的存储器集线器。 存储器集线器包括跟踪一个或多个系统度量的至少一个性能计数器，例如页面命中率，预取命中的数量或百分比，高速缓存命中率或百分比，读取速率，读取请求数，写入速率，写入速率， 写请求，速率或百分比的内存总线利用率，本地集线器请求速率或数量，和/或远程集线器请求速率或数量。

公开(公告)号：WO2002093381A1

公开(公告)日：2002-11-21

申请号：PCT/US2002/015672

申请日：2002-05-16

Applicant: SHAREWAVE, INC.

Inventor： PHAN, Michael, Huy

IPC: G06F11/34

CPC classification number: G06F11/3409 ,  G06F11/3466 ,  G06F2201/88 ,  G06F2201/885

Abstract: An embedded system includes a microprocessor and performance measuring logic coupled to the microprocessor and configured to record selected performance metrics. The performance metrics may be one or more of the following exemplary metrics: overall execution time of a particular routine, number of instruction cycles executed in the particular routine, number of cache hits in the given routine; total number of memory reads in the given routine, total number of memory accesses (reads and writes) in the given routine, number of control bus read cycles in the given routine, number of control bus cycles (reads and writes) in the given routine, number of non-cacheable read cycles in the given routine, and total number of non-cacheable access cycles (reads and writes) in the given routine. In general, a counter is configured to record statistics for each of the performance metrics, and the counters may be controlled using a programmable mask, which is included in a memory coupled to the microprocessor. Based on these metrics, designers may fine-tune software for the embedded system.

Abstract translation: 嵌入式系统包括微处理器和耦合到微处理器的性能测量逻辑，并被配置为记录所选择的性能度量。 性能度量可以是以下示例性度量中的一个或多个：特定例程的总体执行时间，在特定例程中执行的指令周期数，给定例程中的高速缓存命中数; 给定例程中的总存储器读取次数，给定例程中的存储器访问（读取和写入）总数，给定例程中的控制总线读取周期数，给定例程中的控制总线周期数（读取和写入） ，给定例程中不可缓存的读取周期数，以及给定例程中不可缓存的访问周期（读取和写入）的总数。 通常，计数器被配置为记录每个性能度量的统计信息，并且可以使用包括在耦合到微处理器的存储器中的可编程掩码来控制计数器。 基于这些指标，设计人员可以微调嵌入式系统的软件。

公开(公告)号：WO0186447A2

公开(公告)日：2001-11-15

申请号：PCT/US0109872

申请日：2001-03-28

Applicant: MOTOROLA INC

Inventor： GONZALES DAVID R ,  BRANSON BRIAN D ,  GUMULJA JIMMY ,  MOYER WILLIAM C

IPC: G06F11/34

CPC classification number: G06F11/3409 ,  G06F11/349 ,  G06F2201/86 ,  G06F2201/88 ,  G06F2201/885

Abstract: A performance monitor system includes a core processor (115), a core processor associated device, such as a cache (123), and first logic, such as performance logic (127). The core processor (115) is operable to execute information. The core processor associated device provides a first signal (CACHE_PERF), which defines performance of the core processor associated device (123) during operation of the core processor (115). The first logic (127) is coupled to the core processor associated device (123) and monitors the first signal (CACHE_PERF) in response to a second signal (WPT0,1), which defines a match of user-settable attributes associated with the operation of the core processor (115).

Abstract translation: 性能监视器系统包括核心处理器（115），诸如高速缓存（123）的核心处理器相关设备以及诸如性能逻辑（127）之类的第一逻辑。 核心处理器（115）可操作以执行信息。 核心处理器相关设备提供第一信号（CACHE_PERF），其在核心处理器（115）的操作期间定义核心处理器相关设备（123）的性能。 第一逻辑（127）耦合到核心处理器相关设备（123）并且响应于第二信号（WPT0,1）监视第一信号（CACHE_PERF），其定义与操作相关联的用户可设置属性的匹配 的核心处理器（115）。