Abstract:
A cathode panel for a cold cathode field emission display, comprising; (a) a plurality of main wirings (20, 22), (b) a plurality of branch wirings (21, 23) extending from each main wiring (20, 22), and (c) cold cathode electron emitting portions (10) connected to the branch wirings (21, 23), wherein a branch wiring (21, 23) connecting a cold cathode electron emitting portion (10) defective in operation and a main wiring (20, 22) is cut off.
Abstract:
An electron emission device and display including the same include a substrate; a cathode electrode including a first electrode portion formed on the substrate and having opening portions, and second electrode portions placed within respective ones of the opening portions such that the second electrodes are separated from the first electrode; a resistance layer electrically interconnecting the first electrode portion and the second electrode portions of the cathode electrode; and electron emission regions electrically connected to the second electrode portions. A width of the second electrode portions or of the resistance layer between the first and second electrode portions varies along a longitudinal direction of the cathode electrode.
Abstract:
A field-emission electron source which comprises a field-emission electron source part formed on a p-type silicon substrate (1) and an n-channel field-effect transistor part formed on the p-type silicon substrate (1) in a position corresponding to the field-emission electron source part and in which the field-emission electron source part is provided in the drain region of the field-effect transistor part, and the field-emission current from the field-emission source part is controlled by a control voltage applied to the gate electrode (8) of the field-effect transistor part, wherein the drain region includes at least two wells (3, 4) with different impurity concentrations, the well (4) having the lower impurity concentration is provided at an end part of the drain region provided in contact with the channel region of the field-effect transistor part.
Abstract:
A field emission display having emitters controlled by an integrated driving circuit. The field emission display includes a charge shield positioned above exposed areas of the substrate to protect driving circuitry integrated into the substrate. The charge shield is a conductive layer within an insulative layer covering the driving circuit. The charge shield is connected to ground or to a low reference potential to bleed away current within the insulative layer, thereby preventing drifting charges from affecting the electrical response of the integrated driving circuit. The charge shield also terminates electric fields within the insulative layer to reduce the effect on the integrated driving circuit of dynamic variations in surface charge. Electrical characteristics of the driving circuit thus remain constant, reducing variations in the current supplied to the emitters, thereby reducing variations in the intensity of light emitted by the display.
Abstract:
A cold cathode field emission device comprising (a) a cathode electrode (11) formed on a supporting substrate (10), and (b) a gate electrode (13) which is formed above the cathode electrode (11) and has an opening portion (14), and further comprising (c) an electron emitting portion (15) composed of a carbon film (23) formed on a surface of a portion of the cathode electrode (11) which portion is positioned in a bottom portion of the opening portion (14).
Abstract:
A field emission display includes electrostatic discharge protection circuits coupled to an emitter substrate and an extraction grid. In the preferred embodiment, the electrostatic discharge circuit includes diodes reverse biased between grid sections and a first reference potential or between row lines and a second reference potential. The diodes provide a current path to discharge static voltage and thereby prevent a high voltage differential from being maintained between the emitter sets and the extraction grids. The diodes thereby prevent the emitter sets from emitting electrons at a high rate that may damage or destroy the emitter sets. In one embodiment, the diodes are coupled directly between the grid sections and the row lines. In one embodiment, the diodes are formed in an insulative layer carrying the grid sections. In another embodiment, the diodes are integrated into the emitter substrate.
Abstract:
A cathode panel for a cold cathode field emission display, comprising; (a) a plurality of main wirings (20, 22), (b) a plurality of branch wirings (21, 23) extending from each main wiring (20, 22), and (c) cold cathode electron emitting portions (10) connected to the branch wirings (21, 23), wherein a branch wiring (21, 23) connecting a cold cathode electron emitting portion (10) defective in operation and a main wiring (20, 22) is cut off.
Abstract:
A method, device and system for utilizing a pixelized ungated linear array of field emitters and an intergrated electrode-media surface to either detect the presence of charge on the surface in agiven two-dimensional pattern, or to deposit charge on the surface in a desired two-dimensional pattern. The methods, devices and systems disclosed are particularly useful in the arts of printing, scanning and copying. In one embodiment designed for printing, a pixelized surface may be utilized to receive a charge pattern from the ungated linear field emitter array. In one embodiment designed for scanning, a pixelized transfer sheet may be utilized to transfer a two-dimensional charge pattern from a photostatic surface thereto for sensing and detection by the ungated linear field emitter array.
Abstract:
Electron-emissive elements in area electron emitters suitable for flat-panel displays are fabricated at high packing density. The electron-emissive elements have various shapes such as filaments (30A, 30B, or 30/88D1), cones (1181 or 142D), and cone-topped pedestals (92/1021). A typical emitter contains a substrate (20) that provides structural support. A patterned lower non-insulating region (22) formed with parallel lines is provided over insulating material of the substrate. Electron-emissive filaments (30A, 30B, or 30/88D1) are formed in pores (281) extending through an insulating layer (24) furnished over the lower non-insulating region. A patterned non-insulating gate layer (34B, 40B, or 46B) is typically provided over the insulating layer to form a gated device. Charged-particle tracks (261 or 50A1/50B1) are preferably employed to define locations for electron-emissive features. Usage of charged-particle tracks enables the electron-emissive features to be quite small and spaced closely together.