公开(公告)号：US20150181664A1

公开(公告)日：2015-06-25

申请号：US14546323

申请日：2014-11-18

Applicant: CHROMA ATE INC.

Inventor： Che-Cheng HU ,  Chih-Chiao CHANG

IPC: H05B33/08

CPC classification number: H05B33/086

Abstract: A light-emitting module and a driving method thereof are disclosed. In this method, P light-emitting units are selected as a target group, wherein each of the P light-emitting units has N different power parameters corresponding to N sub-bands. P evaluated current values corresponding to the P light-emitting units are computed according to a target spectrum and the N×P power parameters corresponding to the P light-emitting unit in the target group. An emission-spectrum error is computed according to the target spectrum, the N×P power parameters, and the P evaluated current values. It is determined whether the emission-spectrum error conforms with the determining criteria. When the emission-spectrum error conforms with determining criteria, the P evaluated current values are set to be P driving current values corresponding to the P light-emitting units.

Abstract translation: 公开了一种发光模块及其驱动方法。 在该方法中，选择P个发光单元作为目标组，其中每个P个发光单元具有对应于N个子带的N个不同的功率参数。 根据目标光谱和对应于目标组中的P发光单元的N×P功率参数来计算对应于P个发光单元的P评估电流值。 根据目标光谱，N×P功率参数和P评估电流值计算发射光谱误差。 确定发射光谱误差是否符合确定标准。 当发射光谱误差符合确定标准时，P评估电流值被设置为对应于P个发光单元的P个驱动电流值。

公开(公告)号：US20150022231A1

公开(公告)日：2015-01-22

申请号：US14333282

申请日：2014-07-16

Applicant: CHROMA ATE INC.

Inventor： Yi-Chiao Lee ,  Xin-Yi Wu

IPC: G01R31/28

CPC classification number: G01R31/2867 ,  G01R31/2849 ,  G01R31/2874

Abstract: A test apparatus includes a sector conveyance device provided with a plurality of soaking buffers, the soaking buffers being used to carry electronic components, the sector conveyance device being mounted pivotably by a pivot and moved between a test location and a transferring location; a transferring device arranged in correspondence to the transferring location, used to transfer a plurality of electronic components into or out of the sector conveyance device; and a test device arranged in correspondence to the test location for testing electronic components, the electronic components being transferred into the sector conveyance device after test.

Abstract translation: 一种测试装置，包括设置有多个浸泡缓冲器的扇区输送装置，所述均热缓冲器用于承载电子部件，所述扇区传送装置由枢轴可枢转地安装并在测试位置和传送位置之间移动; 传送装置，其对应于所述传送位置布置，用于将多个电子部件传送到所述扇区传送装置中或从所述扇区传送装置传出; 以及与测试电子部件的测试位置对应地配置的测试装置，电子部件在测试后被传送到扇区传送装置。

公开(公告)号：US20130293254A1

公开(公告)日：2013-11-07

申请号：US13875660

申请日：2013-05-02

Applicant: CHROMA ATE INC.

Inventor： Chien-Ming CHEN ,  Meng-Kung LU

IPC: G01R31/28

CPC classification number: G01R31/2887 ,  G01R31/2896

Abstract: A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip.

Abstract translation: 提供了一种用于测试封装封装（PoP）堆叠芯片的底部芯片的测试设备。 底部芯片的上表面具有用于电连接PoP堆叠芯片的顶部芯片的多个对应焊接点的多个焊接点。 测试装置包括测试头和多个测试触点。 测试头内部安装了顶部芯片。 多个测试触点安装在测试头的下表面上并电连接到测试头内的顶部芯片的多个对应焊接点。 当测试头的下表面接触底部芯片的上表面时，多个测试触点电连接到多个焊接点以测试底部芯片。

公开(公告)号：US20130293252A1

公开(公告)日：2013-11-07

申请号：US13854372

申请日：2013-04-01

Applicant: CHROMA ATE INC.

Inventor： Chien-Ming CHEN

IPC: G01R31/28

CPC classification number: G01R31/2896 ,  G01R31/2887

Abstract: A testing system for testing semiconductor package stacking chips is disclosed. The system includes a testing socket, a testing arm, and a testing mechanism. The testing mechanism includes a probe testing device. The probe testing device has a testing chip inside and a plurality of testing probes electrically connected to the testing chip. The plurality of testing probes extends toward the testing socket for contacting a chip-under-test loaded on the testing socket. When the testing mechanism moves to an upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop.

Abstract translation: 公开了一种用于测试半导体封装堆叠芯片的测试系统。 该系统包括测试插座，测试臂和测试机构。 测试机构包括探针测试装置。 探针测试装置内部具有测试芯片，并且多个测试探针电连接到测试芯片。 多个测试探针延伸到测试插座，用于接触加载在测试插座上的芯片下测试。 当测试机构移动到测试插座和测试臂之间的上部位置时，测试臂沿垂直方向向下移动并按压测试机构，从而迫使测试机构中的多个测试探针紧紧靠在芯片上 - 测试，使测试机构内的测试芯片可以电连接到芯片下测试以形成测试回路。

公开(公告)号：US20250155319A1

公开(公告)日：2025-05-15

申请号：US18931867

申请日：2024-10-30

Applicant: CHROMA ATE INC.

Inventor： I-Chang Chiu ,  Hung-Ta Chien ,  Yu-Shuan Lin ,  Shih-Min Hsu ,  Li-Yang Chen ,  Tsung-Hsien Ou

IPC: G01M11/02 ,  H04N13/327

Abstract: A system and a method for calibration of optical measurement devices are described. In one embodiment, the optical measurement device comprises an imaging lens, and the calibration system includes a projection light source, a lens module, and a projection element. The light emitted from the projection light source passes through the projection element and is projected by the lens module, and then captured by the imaging lens of the optical measurement device. The exit pupil of the lens module in the calibration system is coincident with the entrance pupil of the imaging lens of the optical measurement device, providing a compact and highly efficient optical calibration mechanism.

公开(公告)号：US12264854B2

公开(公告)日：2025-04-01

申请号：US17976906

申请日：2022-10-31

Applicant: CHROMA ATE INC.

Inventor： Jian-Hung Lin ,  Shao-En Chung

IPC: F25B13/00 ,  F25B19/00 ,  F25B39/04 ,  F28C3/08

Abstract: A heat exchange device and a cooling system are provided. The heat exchange device includes a low-pressure chamber and a high-pressure chamber disposed in the low-pressure chamber. The low-pressure chamber has a first wall for enabling heat exchange and an output portion in communication with the outside to output the low-pressure fluid. The high-pressure chamber has an input portion in communication with the outside to admit the high-pressure fluid and nozzles in communication with the low-pressure chamber. The fluid discharged from the nozzles undergoes a pressure drop and undergoes heat exchange through the first wall. Cooling capability is developed in the heat exchange device and works in the heat exchange device to thereby dispense with a pipeline which must be otherwise provided to link an expansion process and an evaporation process of the fluid and may otherwise cause cooling capability loss, so as to greatly enhance heat exchange capability and cooling efficiency.

公开(公告)号：US12253541B2

公开(公告)日：2025-03-18

申请号：US18050500

申请日：2022-10-28

Applicant: CHROMA ATE INC.

Inventor： I-Shih Tseng ,  Xin-Yi Wu ,  I-Ching Tsai ,  Chin-Yi Ouyang

IPC: G01R1/04 ,  G01R31/28

Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.

公开(公告)号：US20250027987A1

公开(公告)日：2025-01-23

申请号：US18662134

申请日：2024-05-13

Applicant: CHROMA ATE INC.

Inventor： I-Shih Tseng ,  Chin-Yi Ou Yang ,  I-Ching Tsai ,  Xin-Yi Wu

IPC: G01R31/28 ,  G01R1/04

Abstract: An inspection system with a thermal interface, and an electronic component inspection device and method are provided. First, a temperature regulator contacts an electronic component to be tested, where there is a thermal interface between the temperature regulator and the electronic component to be tested, and the electronic component to be tested includes a plurality of temperature sensing units. Then, the temperature regulator heats or cools the electronic component to be tested to a specific temperature, and the plurality of temperature sensing units of the electronic component to be tested detect temperatures at locations of the temperature sensing units. In this way, a contact condition between the temperature regulator and the electronic component to be tested, and quality or an aging status of the thermal interface can be determined.

公开(公告)号：US12096593B2

公开(公告)日：2024-09-17

申请号：US17969207

申请日：2022-10-19

Applicant: CHROMA ATE INC.

Inventor： Po-Kai Cheng

IPC: H05K7/20

CPC classification number: H05K7/20145 ,  H05K7/20172 ,  H05K7/20436

Abstract: An inlet module is adapted to be disposed on a housing of an electronic device, and includes an insert board and at least one adjusting plate. The insert board has a plurality of first air passages, at least one second air passage, and at least one positioning unit. The second air passage is located between two of the first air passages, and has an area larger than that of each first air passage. The adjusting plate has an opening having an area smaller than that of the second air passage. The adjusting plate is operable to be positioned at a position where the opening and the second air passage are overlapped with each other, thereby reducing an area of the airflow passing through the second air passage.

公开(公告)号：US20240219435A1

公开(公告)日：2024-07-04

申请号：US18395276

申请日：2023-12-22

Applicant: CHROMA ATE INC.

Inventor： Jyun-Yi SU ,  Sheng-Shiuan JIAN ,  Ting-Ting CHANG ,  Wen-Yue CHUANG

IPC: G01R19/165

CPC classification number: G01R19/16566

Abstract: A source measure device includes a current sampling circuit, a voltage sampling circuit, an overvoltage detecting circuit, and a comparing circuit. The current sampling circuit is configured to sample a current of a device under test. The voltage sampling circuit is configured to sample a voltage of the device under test. The overvoltage detecting circuit is coupled to the current sampling circuit and the voltage sampling circuit, and receives a first operation voltage of the current sampling circuit and a second operation voltage of the voltage sampling circuit so as to generate a detection voltage. The comparing circuit is coupled to the overvoltage detecting circuit, and determines whether the detection voltage is within a voltage range. If the detection voltage is not within the voltage range, the comparing circuit generates an abnormal signal.