Pixel voltage regulator
    131.
    发明授权

    公开(公告)号:US11284027B2

    公开(公告)日:2022-03-22

    申请号:US16811259

    申请日:2020-03-06

    Abstract: A pixel circuit wherein a pixel arrangement comprises a pixel comprising a photodetector, an integrator for accumulating a signal from the photodetector, a source following output transistor for amplifying the integrated signal, and a current source for applying a readout current through the output transistor, a voltage regulating circuit comprising an amplifier, a replica transistor dimensioned substantially the same as the output transistor, and a replica current source for providing substantially the readout current through each replica transistor, a gate of the replica transistor is connected with an output node of the amplifier connected with the pixel arrangement, and a source of the replica transistor is connected with a negative input of the amplifier, and with the replica current source, a predefined reference voltage is applicable to a positive input.

    Static address allocation by passive electronics

    公开(公告)号:US11281614B2

    公开(公告)日:2022-03-22

    申请号:US15061587

    申请日:2016-03-04

    Abstract: A bus node IC comprises at least one static address selection terminal and a detecting circuit for detecting a state of the static address selection terminal, and a communication circuit adapted for determining a node address identifier taking the detected state into account. The detecting circuit is adapted for detecting the state by determining an electrical property of a passive electronic component when connected to the static address selection terminal. The communication circuit is adapted for receiving/transmitting data over the data bus in accordance with a first communication protocol using the node address identifier for identification of the IC, and for receiving/transmitting data over said data bus in accordance with a second communication protocol using a further node address identifier for identification of the IC, wherein the communication circuit is adapted for configuring the further node address identifier by using data received using the first protocol.

    DISTORTION DETERMINATION APPARATUS AND METHOD OF DETERMINING A DISTORTION

    公开(公告)号:US20220066004A1

    公开(公告)日:2022-03-03

    申请号:US17409968

    申请日:2021-08-24

    Inventor: Andreas OTT

    Abstract: A motion or saturation determination apparatus (100) comprising: a light source configured to emit light and an optoelectronic device (102) configured to receive an electromagnetic signal and to translate the signal to a plurality of electrical output signals corresponding to a plurality of predetermined phase offset values in accordance with an indirect time of flight measurement technique. A signal processing circuit (110, 116, 126, 132, 136) of the apparatus (100) is configured to process the electrical output signals to calculate a plurality of measurement vectors derived from the plurality of electrical signals. The vectors are in respect of a plurality of frequencies and comprise a first measurement vector for a fundamental harmonic frequency and a second measurement vector for a non-fundamental frequency. The circuit (110, 116, 126, 132, 136) is configured to calculate a scalar relating a first amplitude of the first vector to a second amplitude of the second vector, and to use the scalar to identify motion or saturation in respect of the optoelectronic device (102).

    CMOS based devices for harsh media
    134.
    发明授权

    公开(公告)号:US11195772B2

    公开(公告)日:2021-12-07

    申请号:US16441743

    申请日:2019-06-14

    Abstract: A semiconductor device comprises a first doped semiconductor layer, a second doped semiconductor layer, an oxide layer covering the first doped semiconductor layer and the second doped semiconductor layer, and an interconnect. The first doped semiconductor layer is electrically connected with the second doped semiconductor layer by means of the interconnect which crosses over a sidewall of the second doped semiconductor layer. The interconnect comprises a metal filled slit in the oxide layer. At least one electronic component is formed in the first and/or second semiconductor layer. The semiconductor device moreover comprises a passivation layer which covers the first and second doped semiconductor layers and the oxide layer.

    Pressure sensor device and method of sensing pressure

    公开(公告)号:US11169039B2

    公开(公告)日:2021-11-09

    申请号:US16557213

    申请日:2019-08-30

    Abstract: A pressure sensor device comprises a device package (110) arranged to define a cavity (116) having an opening for fluid communication with an internal volume thereof. The cavity (116) comprises a side wall (114, 115). An elongate pressure sensor element (100) is provided and has a proximal end (120) and a distal end (122). The side wall (114, 115) is arranged to hold fixedly the proximal end (120) of the pressure sensor element (100) therein so that the pressure sensor element (100) is cantilever-suspended from the side wall (114, 115) within the cavity (116).

    OPTICAL SENSOR DIAGNOSTICS
    136.
    发明申请

    公开(公告)号:US20210293941A1

    公开(公告)日:2021-09-23

    申请号:US17203382

    申请日:2021-03-16

    Abstract: A method for diagnosing an optical sensor includes a photodetector and an integrator. The method comprises exposing the photodetector to incoming light; obtaining an initial integrated signal at an initial frame; at least once executing the steps of changing at least one control parameter of the optical sensor, exposing the photodetector to incoming light, and obtaining one or more subsequent integrated signals at a subsequent frame; obtaining a characteristic of the optical sensor from the obtained integrated signals; comparing the obtained characteristic with a pre-determined characteristic of the optical sensor to diagnose the optical sensor.

    Flexible data rate handling in data bus receiver

    公开(公告)号:US11102031B2

    公开(公告)日:2021-08-24

    申请号:US16423806

    申请日:2019-05-28

    Abstract: The present invention relates to a receiver circuit for processing an incoming bit stream from a bus system. The circuit comprises an analog interface for converting the analog signal to a digital input data stream. The interface comprises an analog filter and a switch to process the analog signal before generating the digital input data stream using the filter if, and only if, a selection criterion controlling the switch is met. The circuit comprises a frame decoding unit for decoding a data frame encoded in the digital input data stream in accordance with a CAN protocol, and a frame processing unit that comprises a flexible data rate detector and a recessive bit counter for counting consecutive recessive bits after detecting the flexible data rate frame. The selection criterion is satisfied when the flexible data rate frame is detected and unsatisfied when the recessive bit counter reaches a predetermined number.

    Half-bridge differential sensor
    138.
    发明授权

    公开(公告)号:US11085953B2

    公开(公告)日:2021-08-10

    申请号:US16512526

    申请日:2019-07-16

    Abstract: The present invention relates to a half-bridge signal processing circuit comprising a first and a second branch. The first branch comprises a first stimulus responsive sense element and a first current source arranged to provide a current to the first sense element. The second branch comprises a second stimulus responsive sense element and a second current source arranged to provide a current to said second sense element. The first and the second branch have a terminal in common. The first branch comprises a first node between said the current source and the first stimulus responsive sense element configured to generate a first signal related to a voltage over the first sense element. The second branch comprises a second node between the second current source and the second stimulus responsive sense element configured to generate a second signal related to a voltage over the second sense element.

    PHASE ANGLE CORRECTION VALUE CALCULATION APPARATUS AND METHOD OF CALCULATING A PHASE ANGLE CORRECTION VALUE

    公开(公告)号:US20210173088A1

    公开(公告)日:2021-06-10

    申请号:US17117303

    申请日:2020-12-10

    Abstract: A phase angle error calculation apparatus (100) comprising a light source (102) that emits light according to an indirect time of flight (iToF) measurement technique. A photonic mixer cell (104) generates and stores a plurality of electrical output signals corresponding to a plurality of predetermined phase offset values. A signal processing circuit processes the electrical output signals according to the iToF measurement technique in order to calculate a reference vector and a reference phase angle therefrom. The output signals correspond to measurement at a first level of precision. The circuit processes a subset of output signals according to the iToF measurement technique and calculates a measurement vector and a measurement phase angle therefrom. The subset of the output signals corresponds to measurement at a second level of precision lower than the first level of precision. The circuit calculates a phase angle correction value using the reference phase angle and the measurement phase angle.

    OPTICAL RANGE CALCULATION APPARATUS AND METHOD OF RANGE CALCULATION

    公开(公告)号:US20210173054A1

    公开(公告)日:2021-06-10

    申请号:US17109356

    申请日:2020-12-02

    Inventor: Andreas OTT

    Abstract: An optical range calculation apparatus (100) comprises a light source configured to emit light in accordance with an indirect time of flight measurement technique. A photonic mixer cell (102) is configured to generate and store a plurality of electrical output signals respectively corresponding to a plurality of predetermined phase offset values applied (112) in accordance with the indirect time of flight measurement technique. A signal processing circuit (110, 124) is configured to process the plurality of electrical output signals in accordance with the indirect time of flight measurement technique in order to calculate a measurement vector and a measured phase angle from the measurement vector. The signal processing circuit (110, 124) is configured to calculate a phase angle correction value using reference illumination data and to apply the calculated phase angle correction value in order to correct the measured phase angle, and the signal processing circuit is configured to calculate a range using the corrected measured phase angle.

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