公开(公告)号：WO1996008816A1

公开(公告)日：1996-03-21

申请号：PCT/US1995011535

申请日：1995-09-12

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  STEYAERT, Michel ,  DEHAENE, Wim ,  CRANINCKX, Jan ,  WALSH, Mairtin ,  REAL, Peter

IPC: G11B05/596

CPC classification number: G11B5/59655

Abstract: A servo system for controlling the position of a read/write head in a disk drive is provided. The servo system includes two input terminals for sequentially receiving a plurality of input signal AC voltage bursts of a burst pattern, wherein the input signal bursts include positional information of the head. Demodulation circuitry, coupled to the input terminals, sequentially demodulates each input signal burst and provides a demodulated signal for each burst. The demodulation circuitry includes translation circuitry, coupled to the input, for sequentially translating each input voltage burst to a translated current. A rectifier circuit, coupled to the translation circuitry, including an absolute value circuit and a current mirror circuit, sequentially rectifies each translated current and produces a driving signal. An integrator, coupled to the rectifier circuit, sequentially integrates each driving signal. The integrator includes an integration capacitor which is sequentially charged by each driving signal. In the preferred embodiment, the current mirror circuit includes an operational amplifier and a gain circuit. Also in the prefered embodiment, the voltage to current translation circuit includes a folded cascode circuit arrangement of a plurality of CMOS transistors.

Abstract translation: 提供了一种用于控制磁盘驱动器中读/写磁头的位置的伺服系统。 伺服系统包括两个输入端子，用于顺序地接收突发模式的多个输入信号AC电压脉冲串，其中输入信号脉冲串包括磁头的位置信息。 耦合到输入端的解调电路顺序地解调每个输入信号脉冲串，并为每个脉冲串提供解调信号。 解调电路包括耦合到输入的平移电路，用于将每个输入电压脉冲串顺序地转换成转换的电流。 耦合到包括绝对值电路和电流镜电路的平移电路的整流器电路顺序地对每个转换的电流进行整流并产生驱动信号。 耦合到整流电路的积分器顺序地对每个驱动信号进行积分。 积分器包括由每个驱动信号依次充电的积分电容器。 在优选实施例中，电流镜电路包括运算放大器和增益电路。 同样在优选实施例中，电压 - 电流转换电路包括多个CMOS晶体管的折叠共源共栅电路装置。

公开(公告)号：WO1995034134A1

公开(公告)日：1995-12-14

申请号：PCT/US1995007307

申请日：1995-06-06

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  MCCARTNEY, Damien

IPC: H03M03/02

CPC classification number: H03M3/322 ,  H03M3/502

Abstract: A switched-capacitor DAC system includes an integrator circuit including an op amp (60) having an input lead (62, 64), an output lead (66, 68) and an integrator capacitor (C3, C4) connected between the input lead and the output lead. A sampling switch (78) is operable to connect an input capacitor (C1, C2) to be charged by an input voltage (V ref) during at least one of first and second nonoverlapping time intervals, wherein the first time interval is subdivided into first and second nonoverlapping sub-intervals and the second time interval is subdivided into third and fourth nonoverlapping sub-intervals. A transferring switch (80) is operable to connect the input capacitor to transfer charge from the input capacitor to transfer charge from the input capacitor to the integrator capacitor (C3, C4) during at least one of the first and third sub-intervals. A discharging switch (S8, S10) is operable to connect the input capacitor to a discharge node during at least one of the second and fourth sub-intervals. In a preferred embodiment of the present invention, the sampling switch connects the input capacitor during one of the first and second sub-intervals, the transferring switch connects the input capacitor during one of the first and third sub-intervals, and the discharging switch connects the input capacitor during one of the second and fourth sub-intervals.

Abstract translation: 开关电容器DAC系统包括积分器电路，其包括具有输入引线（62,64）的运算放大器（60），输出引线（66,68）和积分电容器（C3，C4），其连接在输入引线和 输出引线。 采样开关（78）可操作以在第一和第二不重叠时间间隔中的至少一个期间连接要由输入电压（V ref）充电的输入电容器（C1，C2），其中第一时间间隔被细分为第一 和第二非重叠子间隔，并且第二时间间隔被细分为第三和第四非重叠子间隔。 转移开关（80）可操作以在至少一个第一和第三子间隔期间连接输入电容器以从输入电容器传送电荷以将电荷从输入电容器传递到积分电容器（C3，C4）。 放电开关（S8，S10）可操作以在第二和第四子间隔中的至少一个期间将输入电容器连接到放电节点。 在本发明的优选实施例中，采样开关在第一和第二子间隔之一期间连接输入电容器，转移开关在第一和第三子间隔之一期间连接输入电容器，并且放电开关连接 在第二和第四子间隔期间的输入电容器。

公开(公告)号：WO1995031860A1

公开(公告)日：1995-11-23

申请号：PCT/US1995003739

申请日：1995-03-23

Applicant: ANALOG DEVICES, INC. ,  WILSON, James ,  CELLINI, Ronald, A. ,  SOBOL, James, M.

Inventor： ANALOG DEVICES, INC.

IPC: H03H17/06

CPC classification number: H03H17/0628 ,  H03H17/0614 ,  H03L7/08 ,  H03L7/093 ,  H03L7/0992 ,  H03L2207/50

Abstract: A method and apparatus for digital-to-digital conversion using sigma-delta modulation of the temporal spacing between digital samples. The method and apparatus of the present invention provides for sigma-delta modulation of the time base such that noise produced by nonuniform sampling are frequency-shaped to a region (i.e., shifted to higher frequencies) where it can be removed by conventional filtering techniques. In one embodiment, the digital data is interpolated (16) by fixed ratio and then decimated (21) under control of a first sigma-delta modulated frequency selection signal (26) that represents, on average, the data rate of the incoming digital data stream. Thereafter, the digital data is interpolated (30) under control of a second sigma-delta modulated frequency selection signal (46) that represents, on average, the data rate of the digital data to be output by the converter and then decimated (40) by a fixed ratio. In another embodiment, the digital data is interpolated under control of a first sigma-delta modulated frequency selection signal that represents, on average, the data rate of the incoming digital data stream and then decimated by a fixed ratio. Thereafter, the digital data is interpolated by a fixed ratio and then decimated under control of a second sigma-delta modulated frequency selection signal that represents, on average, the data rate of the digital data to be output by the converter. The first and second frequency signal selection numbers are modulated using n-th order m-bit sigma-delta modulators. The method and apparatus converts the data rate of the incoming digital data stream to the data rate of the first n-th m-bit sigma-delta modulator and then converts the digital data stream from the first sigma-delta modulator (20) to an output data rate determined by the second n-th order m-bit sigma-delta modulator (32).

Abstract translation: 一种使用数字样本之间的时间间隔的Σ-Δ调制进行数模转换的方法和装置。 本发明的方法和装置提供了时基的Σ-Δ调制，使得由不均匀采样产生的噪声被频率形成为可以通过常规滤波技术去除的区域（即，移位到较高频率）。 在一个实施例中，数字数据以固定比例内插（16），然后在第一Σ-Δ调制频率选择信号（26）的控制下抽取（21），平均来说代表输入数字数据的数据速率 流。 此后，数字数据在第二Σ-Δ调制频率选择信号（46）的控制下被内插（30），第二Σ-Δ调制频率选择信号平均表示要由转换器输出的数字数据的数据速率，然后抽取（40） 按固定比例。 在另一实施例中，数字数据在第一Σ-Δ调制频率选择信号的控制下进行内插，该第一Σ-Δ调制频率选择信号平均表示输入数字数据流的数据速率，然后以固定比率抽取。 此后，数字数据以固定比例内插，然后在第二Σ-Δ调制频率选择信号的控制下抽取，该第二Σ-Δ调制频率选择信号平均表示要由转换器输出的数字数据的数据速率。 第一和第二频率信号选择号码使用n阶m位Σ-Δ调制器进行调制。 该方法和装置将输入数字数据流的数据速率转换为第一n位m位Σ-Δ调制器的数据速率，然后将来自第一Σ-Δ调制器（20）的数字数据流转换为 由第二n位m位Σ-Δ调制器（32）确定的输出数据速率。

公开(公告)号：WO1995030943A1

公开(公告)日：1995-11-16

申请号：PCT/US1995005747

申请日：1995-05-08

Applicant: ANALOG DEVICES, INC. ,  GILBERT, Barrie ,  SHU, Shao-Feng

Inventor： ANALOG DEVICES, INC.

IPC: G05F03/16

CPC classification number: G05F3/267

Abstract: A switched capacitor (SC) network is used in conjunction with a single PN junction to form a switching bandgap reference voltage circuit. The circuit includes an amplifier having an inverting input, a noninverting input, and an output; a first capacitor having a first capacitance (C1) coupled between the amplifier inverting input and a first common voltage source; a second capacitor having a second capacitance (C2) coupled between the amplifier inverting input and the amplifier output; a transistor having a base, a collector, and an emitter, the base and collector being coupled to the first common voltage source, and the emitter being coupled to the amplifier noninverting input. Two current sources are coupled to the transistor to bias the transistor to a one level during a precharge mode and a second, higher level during a reference voltage mode. A switch is connected in parallel with the second capacitor. The switch is opened during the precharge mode and closed during the reference voltage mode wherein a bandgap reference voltage (V0) is produced at the amplifier output during the reference voltage mode equal to: V0 = VBE2 + (C2/C1) x (VBE2 - VBE1).

Abstract translation: 开关电容器（SC）网络与单个PN结结合使用以形成开关带隙基准电压电路。 该电路包括具有反相输入，同相输入和输出的放大器; 第一电容器，具有耦合在放大器反相输入端和第一公共电压源之间的第一电容（C1）; 具有耦合在所述放大器反相输入端和所述放大器输出端之间的第二电容（C2）的第二电容器; 具有基极，集电极和发射极的晶体管，所述基极和集电极耦合到所述第一公共电压源，并且所述发射极耦合到所述放大器的非反相输入端。 两个电流源耦合到晶体管，以在预充电模式期间将晶体管偏置为一个电平，并在参考电压模式期间将第二较高电平偏置。 开关与第二电容器并联连接。 开关在预充电模式期间打开，在参考电压模式期间闭合，其中在参考电压模式期间在放大器输出处产生带隙参考电压（V0）等于：V0 = VBE2 +（C2 / C1）×（VBE2- VBE1）。

公开(公告)号：WO1995030280A1

公开(公告)日：1995-11-09

申请号：PCT/US1995005279

申请日：1995-04-27

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  GARAVAN, Patrick, J.

IPC: H03M01/38

CPC classification number: H03M1/144 ,  H03M1/468 ,  H03M1/804

Abstract: A method of operating a charge redistribution analog-to-digital converter. The method includes sampling a first voltage with a capacitive network, and then switching the plate of one of the capacitors in the network from a supply voltage node to a reference voltage node. After switching, a second voltage is sampled, and a quantity of charge stored in the capacitive network, which quantity results from both of the sampling steps, is tested. In another general aspect, a method of converting an analog voltage to a digital value, which includes sampling a charge related to the analog voltage, and precharging and charging capacitors in an array. The charge sampled in the step of sampling is then tested against a charge stored in the capacitors in the array.

Abstract translation: 一种操作电荷再分配模数转换器的方法。 该方法包括用电容网络对第一电压进行采样，然后将网络中的一个电容器的电压从电源电压节点切换到参考电压节点。 在切换之后，对第二电压进行采样，并且测量存储在电容网络中的电荷量，这两个采样步骤产生的数量都来自两个采样步骤。 在另一个总体方面，一种将模拟电压转换为数字值的方法，其包括对与模拟电压相关的电荷进行采样，以及对阵列中的电容器进行预充电和充电。 然后在采样步骤中采样的电荷针对存储在阵列中的电容器中的电荷进行测试。

公开(公告)号：WO1995030279A1

公开(公告)日：1995-11-09

申请号：PCT/US1995005404

申请日：1995-04-27

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  COTTER, Martin, G. ,  GARAVAN, Patrick, J.

IPC: H03M01/06

CPC classification number: H03M1/1028 ,  H03M1/468 ,  H03M1/804

Abstract: A charge redistribution analog-to-digital converter. This converter includes an offset correcting circuit operatively connected in parallel with a capacitor array and responsive to a sampling input of the analog-to-digital converter, and a gain correcting circuit operatively connected in parallel with a sampling capacitor and responsive to the sampling input of the analog-to-digital converter. In another general aspect, an analog-to-digital converter calibration method for a charge redistribution analog-to-digital converter, that includes adjusting an input offset of an input of the analog-to-digital converter and adjusting a gain offset of the analog-to-digital converter. The steps of adjusting are then repeated until a predetermined level of error is achieved for the analog-to-digital converter.

Abstract translation: 电荷再分配模数转换器。 该转换器包括与电容器阵列并行操作并响应于模拟 - 数字转换器的采样输入的偏移校正电路，以及增益校正电路，其可操作地与采样电容并联并且响应于采样输入 模数转换器。 在另一个总体方面，一种用于电荷再分配模数转换器的模数转换器校准方法，包括调整模数转换器的输入的输入偏移并调整模数转换器的增益偏移 数字转换器。 然后重复调整步骤，直到模数转换器达到预定的误差水平。

公开(公告)号：WO1995004933A1

公开(公告)日：1995-02-16

申请号：PCT/US1994008791

申请日：1994-08-04

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  CHAU, Kevin, H., L. ,  SALTMARSH, Michael, P. ,  CHURCH, Deborah, A.

IPC: G01P15/08

CPC classification number: B81C1/0092 ,  B81B2203/0109 ,  B81C1/00944 ,  B81C2201/0109 ,  G01P15/0802 ,  G01P2015/0814

Abstract: A method and apparatus for forming bridges between surfaces of a suspended microstructure and other surfaces of the suspended microstructure or particularly placed anchors on the die in order to increase the stiffness and lateral strength of the microstructure during fabrication. Once fabrication is completed, the bridges are cut by a laser thus fully releasing the microstructure into its final suspended and resilient condition.

Abstract translation: 一种用于在悬浮的微结构的表面之间形成桥的方法和装置，其中悬浮的微结构的其它表面或特别放置在模具上的锚固件，以便在制造期间增加微结构的刚度和横向强度。 一旦制造完成，桥梁被激光切割，从而将微结构完全释放到其最终的悬浮和弹性状态。

公开(公告)号：WO1994002299A1

公开(公告)日：1994-02-03

申请号：PCT/US1993006422

申请日：1993-07-08

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  ROBERTS, Carl, M., Jr. ,  LONG, Lewis, H. ,  RUGGERIO, Paul, A.

IPC: B28D05/02

CPC classification number: B81C1/00888 ,  B28D1/003 ,  B28D5/0058 ,  B28D5/02 ,  H01L21/6836 ,  H01L2221/68322 ,  H01L2221/68327 ,  H01L2223/54453 ,  H01L2223/54466 ,  H01L2924/19041 ,  H01L2924/30105 ,  Y10S438/975

Abstract: A method and apparatus for separating individual dies (14) from a wafer (32) in which the wafer is adhered to a plastic film (26) on a film carrier (16) with the circuit side of the wafer facing the film (26). In this manner, the circuitry is protected from dust, and trauma from the sawing and cleaning processes because the circuitry is sealed between the film and the non-circuit side of the wafer. A punching station is programmed to punch holes (28) in the film (26) in a pattern corresponding to the relative positions of the microstructures on the wafer (32). Sets of alignment holes (30a) and (30b) are punched in the film (26) such that they will be beyond the perimeter of the wafer (32).

Abstract translation: 一种用于从晶片（32）分离单个管芯（14）的方法和设备，其中晶片与薄膜载体（16）上的塑料薄膜（26）粘合，晶片的电路面面向薄膜（26）， 。 以这种方式，电路被保护免受灰尘和来自锯切和清洁过程的损伤，因为电路被密封在膜和晶片的非电路侧之间。 冲压站被编程为以对应于晶片（32）上的微结构的相对位置的图案对薄膜（26）中的孔（28）进行打孔。 一组对准孔（30a）和（30b）在膜（26）中被冲压成使得它们将超过晶片（32）的周边。

公开(公告)号：WO1993025915A1

公开(公告)日：1993-12-23

申请号：PCT/US1993004303

申请日：1993-05-06

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  TSANG, Robert, W., K. ,  CORE, Theresa, A. ,  SHERMAN, Steven, J. ,  BROKAW, A., Paul

IPC: G01P15/08

CPC classification number: B81B3/001 ,  B81C1/00246 ,  B81C2201/014 ,  B81C2201/053 ,  B81C2201/112 ,  B81C2203/0742 ,  G01P15/0802 ,  G01P15/125 ,  G01P15/131 ,  G01P2015/0814

Abstract: The invention comprises a method for fabricating a monolithic chip containing integrated circuitry as well as a suspended polysilicon microstructure. The inventive method comprises 67 processes which are further broken down into approximately 330 steps. The processes and their arrangement allow for compatible fabrication of transistor circuitry and the suspended polysilicon microstructure on the same chip.

Abstract translation: 本发明包括一种用于制造包含集成电路以及悬浮的多晶硅微结构的单片芯片的方法。 本发明的方法包括67个进一步细分为大约330个步骤的过程。 这些工艺及其布置允许在同一芯片上兼容制造晶体管电路和悬浮的多晶硅微结构。

公开(公告)号：WO1993024999A1

公开(公告)日：1993-12-09

申请号：PCT/US1993004866

申请日：1993-05-24

Applicant: ANALOG DEVICES, INC.

Inventor： ANALOG DEVICES, INC. ,  JORDAN, Edward, Perry

IPC: H03K07/08

CPC classification number: H03K7/08

Abstract: A dual edge pulse width modulation system including a ramp generator (108) for generating a voltage ramp; an n bit digital to analog converter (102, 104) having a normal and an inverted output for establishing a leading edge and a trailing edge reference; a comparator (106) responsive to the ramp and the leading edge and trailing edge references, respectively, for defining the leading edge and the trailing edge of a pulse; and a pulse generator (122) for producing a pulse having the width determined by the defined leading and trailing edges.