Abstract:
A programmable crystal oscillator is provided having a memory for storing frequency-defining parameters. Typically, one of these parameters is used to program an adjustable capacitive load circuit coupled to a crystal to thereby adjust the crystal source frequency. Additional parameters are used to program the output frequency of a phase locked loop circuit coupled to receive the adjusted source frequency. A further parameter can also be used to divide the output frequency of the phase locked loop circuit to supply a specified output frequency. The oscillators can be manufactured as generic programmable crystal oscillators without regard for output frequency and then quickly programmed to produce customer-specified output frequencies with a high degree of accuracy.
Abstract:
A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.
Abstract:
A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.
Abstract:
Embodiments of this application disclose a dual-mode oscillator and a multi-phase oscillator. In the dual-mode oscillator, switching between two operating modes is implemented by using a mode switching circuit, so that oscillation signals having two different bands can be obtained. Moreover, the dual-mode oscillator includes two transformer-coupled oscillators, and a step-up transformer in any transformer-coupled oscillator multiplies a drain voltage swing of a first MOS transistor and then injects a voltage signal to a gate of a second MOS transistor, so that a larger gate voltage swing is obtained without increasing a supply voltage of the oscillator, and phase noise performance of the dual-mode oscillator is improved. In the multi-phase oscillator, multiple dual-mode transformer-coupled oscillators are connected through multi-phase coupled circuits to form a Mobius loop, so that oscillation signals in multiple phases can be generated, and phase noise performance of the entire oscillator can be improved.
Abstract:
An oscillator circuit having a source of an oscillating signal, a tank circuit including an inductor (18, 420, 421) and a capacitor (18, 420, 421), and a discretely switchable capacitance module (14, 314) configured to control an amount of capacitance in the oscillator circuit. The discretely switchable capacitance module (14, 314) includes, a capacitor (22, 322) coupled between a first node (41, 341) and a second node (42, 342), a switch (24, 320) coupled between the second node (42, 322) and a third node (43, 343); and a DC feed circuit (28, 328, 329), having a first end (28a, 328a, 329a) coupled to the second node (42) and a second end (28b, 328b, 329b) configured to receive a first or second control signal (30, 330). The control node (25, 325) of the switch (24, 320) is tied to a predetermined bias voltage (26, 326). When the first control signal (30, 330) is applied, the capacitor (22) is coupled between the first node (41, 341) and the third node (43, 343) via the switch (24, 320), and when the second control signal (30, 330) is applied the capacitor (22) is decoupled from the inductor (18, 420, 421).
Abstract:
An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terminal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.
Abstract:
A fully integrated, programmable mixed-signal radio transceiver comprising a radio frequency integrated circuit (RFIC) which is frequency and protocol agnostic with digital inputs and outputs, the radio transceiver being programmable and configurable for multiple radio frequency bands and standards and being capable of connecting to many networks and service providers. The RFIC includes a tunable resonant circuit that includes a transmission line having an inductance, a plurality of switchable capacitors configured to be switched into and out of the tunable resonant circuit in response to a first control signal, and at least one variable capacitor that can be varied in response to a second control signal, wherein a center resonant frequency of the resonant circuit is electronically tunable responsive to the first and second control signals that control a first capacitance value of the plurality of switchable capacitors and a second capacitance value of the at least one variable capacitor.
Abstract:
The invention relates to a structural element with an integrated high-frequency circuit. A ladder network (12) is connected in parallel to a resonator circuit (1), said ladder network comprising trimming capacitors (18). Said trimming capacitors can be connected in parallel to the variable capacitance diodes (3) in the resonator circuit (1) via PIN diodes (17), thereby allowing for the resonator circuit (1) to be trimmed.
Abstract:
A variable frequency oscillator comprising: an oscillatory circuit for generating a periodic output dependant on the capacitance between a first node and a second node of the circuit, and having a capacitative element connected between the first node and the second node; the capacitative element comprising: a variable capacitance unit, the capacitance of which is variable for varying the frequency of the output; and a plurality of trimming capacitances each being selectively connectable in parallel with the variable capacitance unit between the first node and the second node to trim the frequency of the output.
Abstract:
Eine Oszillatorschaltung mit zuschaltbaren Kapazität (C3, C4) ermöglicht die Umschaltung des Oszillators zwischen zumindest zwei Frequenzen. Zum Umschalten ist eine Schalteinheit (TL) vorgesehen, welche einen ersten Schalter (T3) umfaßt, welcher zwischen die schaltbaren Kapazitäten (C3, C4) geschaltet ist sowie weitere Schalter (T1, T2), die gegen einen Versorgungsspannungsanschluß (GND) geschaltet sind. Gegenüber herkömmlichen umschaltbaren Oszillatoren weist die beschriebene Schaltung den Vorteil auf, daß im eingeschalteten Zustand der zuschaltbaren Kapazitäten (C3, C4) ein besonders geringer Durchlaßwiderstand, und dennoch im ausgeschalteten Zustand besonders kleine parasitäre Kapazitäten wirksam sind. Die beschriebene Oszillatorschaltung ist mit besonders geringer Chipfläche realisierbar, da die Schalter (T1, T2, T3) in einer gemeinsamen Transistorstruktur mit gemeinsamen Steueranschluß (G) integrierbar sind. Die Oszillatorschaltung ist besonders für Mobilfunkanwendungen geeignet.