公开(公告)号：WO98034338A1

公开(公告)日：1998-08-06

申请号：PCT/US1998/001796

申请日：1998-02-03

IPC: H03B5/32 ,  H03B1/00 ,  H03B5/36 ,  H03B19/00 ,  H03L7/089 ,  H03L7/18 ,  H03L7/183

CPC classification number: H03L7/183 ,  H03B5/366 ,  H03B19/00 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/0898

Abstract: A programmable crystal oscillator is provided having a memory for storing frequency-defining parameters. Typically, one of these parameters is used to program an adjustable capacitive load circuit coupled to a crystal to thereby adjust the crystal source frequency. Additional parameters are used to program the output frequency of a phase locked loop circuit coupled to receive the adjusted source frequency. A further parameter can also be used to divide the output frequency of the phase locked loop circuit to supply a specified output frequency. The oscillators can be manufactured as generic programmable crystal oscillators without regard for output frequency and then quickly programmed to produce customer-specified output frequencies with a high degree of accuracy.

Abstract translation: 提供了一种可编程晶体振荡器，其具有用于存储频率限定参数的存储器。 通常，这些参数之一用于对耦合到晶体的可调容性负载电路进行编程，从而调节晶体源频率。 附加参数用于编程耦合以接收经调整的源频率的锁相环电路的输出频率。 还可以使用另外的参数来分频锁相环电路的输出频率以提供指定的输出频率。 振荡器可以制造为通用可编程晶体振荡器，而不考虑输出频率，然后快速编程，以高精确度生成客户指定的输出频率。

公开(公告)号：WO9426041A3

公开(公告)日：1994-12-22

申请号：PCT/US9404304

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORP ,  SAUER DONALD JON ,  RODDA WILLIAM ,  CAMPBELL EDWARD RICHARD III

Inventor： SAUER DONALD JON ,  RODDA WILLIAM ,  CAMPBELL EDWARD RICHARD III

IPC: H03L7/08 ,  H03B1/00 ,  H03B5/20 ,  H03B5/24 ,  H03K3/354 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/113 ,  H03L7/14 ,  H04N5/12 ,  H04N5/445 ,  H04N5/45 ,  H04N7/12 ,  H04C

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

公开(公告)号：WO1994026041A2

公开(公告)日：1994-11-10

申请号：PCT/US1994004304

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORPORATION ,  SAUER, Donald, Jon ,  RODDA, William ,  CAMPBELL, Edward, Richard, III

Inventor： RCA THOMSON LICENSING CORPORATION

IPC: H04C07/113

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

Abstract translation: 锁相环电路的频率检测器用于测量振荡器的输出信号的频率和同步信号的频率之间的频率误差。 当同步信号的32个周期中的每个周期中的频率误差超过预定幅度时，锁相环电路以粗频率校正模式开始工作。 只要32个周期没有经过，锁相环电路就工作在空闲的工作模式，并且振荡器不被校正。 结果，在垂直回扫期间，当发生均衡脉冲时，锁相环电路不会受到大的频率误差的干扰。

公开(公告)号：EP3319229A2

公开(公告)日：2018-05-09

申请号：EP17191767.7

申请日：2017-09-19

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： SHU, Yiyang ,  QIAN, Huizhen ,  LUO, Xun

IPC: H03B5/12 ,  H03B27/00

CPC classification number: H03B5/02 ,  H03B5/1212 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1296 ,  H03B27/00 ,  H03B2200/0074 ,  H03B2200/009 ,  H03B2201/0266

Abstract: Embodiments of this application disclose a dual-mode oscillator and a multi-phase oscillator. In the dual-mode oscillator, switching between two operating modes is implemented by using a mode switching circuit, so that oscillation signals having two different bands can be obtained. Moreover, the dual-mode oscillator includes two transformer-coupled oscillators, and a step-up transformer in any transformer-coupled oscillator multiplies a drain voltage swing of a first MOS transistor and then injects a voltage signal to a gate of a second MOS transistor, so that a larger gate voltage swing is obtained without increasing a supply voltage of the oscillator, and phase noise performance of the dual-mode oscillator is improved. In the multi-phase oscillator, multiple dual-mode transformer-coupled oscillators are connected through multi-phase coupled circuits to form a Mobius loop, so that oscillation signals in multiple phases can be generated, and phase noise performance of the entire oscillator can be improved.

Abstract translation: 本申请的实施例公开了一种双模式振荡器和多相振荡器。 在双模振荡器中，通过使用模式切换电路来实现两种工作模式之间的切换，从而可以获得具有两个不同频带的振荡信号。 此外，双模式振荡器包括两个变压器耦合振荡器，并且任何变压器耦合振荡器中的升压变压器乘以第一MOS晶体管的漏极电压摆动，然后将电压信号注入第二MOS晶体管的栅极 ，从而在不增加振荡器的电源电压的情况下获得更大的栅极电压摆动，并且双模振荡器的相位噪声性能得到改善。 在多相振荡器中，多个双模变压器耦合振荡器通过多相耦合电路连接形成一个莫比乌斯回路，从而可以产生多相振荡信号，并且整个振荡器的相位噪声性能可以 改进。

公开(公告)号：EP2403134A3

公开(公告)日：2015-07-01

申请号：EP10189160.4

申请日：2010-10-28

Applicant: RichWave Technology Corp.

Inventor： Chen, Tse-Peng

IPC: H03B5/12 ,  H03K17/693 ,  H03J5/02

CPC classification number: H03B5/1228 ,  H03B5/1212 ,  H03B5/1265 ,  H03B2201/0266 ,  H03J3/20 ,  H03J2200/10

Abstract: An oscillator circuit having a source of an oscillating signal, a tank circuit including an inductor (18, 420, 421) and a capacitor (18, 420, 421), and a discretely switchable capacitance module (14, 314) configured to control an amount of capacitance in the oscillator circuit. The discretely switchable capacitance module (14, 314) includes, a capacitor (22, 322) coupled between a first node (41, 341) and a second node (42, 342), a switch (24, 320) coupled between the second node (42, 322) and a third node (43, 343); and a DC feed circuit (28, 328, 329), having a first end (28a, 328a, 329a) coupled to the second node (42) and a second end (28b, 328b, 329b) configured to receive a first or second control signal (30, 330). The control node (25, 325) of the switch (24, 320) is tied to a predetermined bias voltage (26, 326). When the first control signal (30, 330) is applied, the capacitor (22) is coupled between the first node (41, 341) and the third node (43, 343) via the switch (24, 320), and when the second control signal (30, 330) is applied the capacitor (22) is decoupled from the inductor (18, 420, 421).

公开(公告)号：EP1925077A1

公开(公告)日：2008-05-28

申请号：EP06814487.2

申请日：2006-09-12

Applicant: Silicon Laboratories Inc.

Inventor： VANCORENLAND, Peter ,  LIM, Lysander ,  MARQUES, Augusto M. ,  WILLINHAM, Scott D.

IPC: H03J3/18 ,  H03B5/12 ,  H03L7/099

CPC classification number: H03J3/185 ,  H03B5/1243 ,  H03B5/1293 ,  H03B2200/0062 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03J7/10 ,  H03J2200/36 ,  H03L7/099

Abstract: An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terminal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.

公开(公告)号：EP1714379A1

公开(公告)日：2006-10-25

申请号：EP05713304.3

申请日：2005-02-10

Applicant: Bitwave Semiconductor

Inventor： CYR, Russell, J. ,  DAWE, Geoffrey, C.

IPC: H03C3/22 ,  H03B5/12 ,  H03L7/099 ,  H03F1/22 ,  H03F1/08 ,  H03F3/19 ,  H03G1/00

CPC classification number: H03F1/26 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/12034 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1293 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03C3/225 ,  H03D3/007 ,  H03F1/0205 ,  H03F1/08 ,  H03F1/223 ,  H03F1/3294 ,  H03F3/191 ,  H03F3/195 ,  H03F3/4521 ,  H03F3/60 ,  H03F2200/111 ,  H03F2200/225 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/366 ,  H03F2200/372 ,  H03F2200/391 ,  H03F2200/429 ,  H03F2200/543 ,  H03F2200/78 ,  H03F2203/45256 ,  H03G3/3068 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/10 ,  H03L7/185 ,  H04B1/006 ,  H04B1/40 ,  H04W24/00 ,  H04W80/00 ,  H04W88/02 ,  H01L2924/00011 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A fully integrated, programmable mixed-signal radio transceiver comprising a radio frequency integrated circuit (RFIC) which is frequency and protocol agnostic with digital inputs and outputs, the radio transceiver being programmable and configurable for multiple radio frequency bands and standards and being capable of connecting to many networks and service providers. The RFIC includes a tunable resonant circuit that includes a transmission line having an inductance, a plurality of switchable capacitors configured to be switched into and out of the tunable resonant circuit in response to a first control signal, and at least one variable capacitor that can be varied in response to a second control signal, wherein a center resonant frequency of the resonant circuit is electronically tunable responsive to the first and second control signals that control a first capacitance value of the plurality of switchable capacitors and a second capacitance value of the at least one variable capacitor.

公开(公告)号：EP1260021B1

公开(公告)日：2006-10-18

申请号：EP01915336.0

申请日：2001-03-14

Applicant: Infineon Technologies AG

Inventor： LOSEHAND, Reinhard ,  WERTHMANN, Hubert ,  BARTL, Ulf

IPC: H03J3/20

CPC classification number: H03J3/20 ,  H03B2201/0266 ,  H03J3/185 ,  H03J2200/10

Abstract: The invention relates to a structural element with an integrated high-frequency circuit. A ladder network (12) is connected in parallel to a resonator circuit (1), said ladder network comprising trimming capacitors (18). Said trimming capacitors can be connected in parallel to the variable capacitance diodes (3) in the resonator circuit (1) via PIN diodes (17), thereby allowing for the resonator circuit (1) to be trimmed.

公开(公告)号：EP1198879B1

公开(公告)日：2004-04-14

申请号：EP00946138.5

申请日：2000-07-18

Applicant: Cambridge Silicon Radio Limited

Inventor： COLLIER, James, Digby, Yarlet ,  SABBERTON, Ian, Michael

IPC: H03B5/12

CPC classification number: H03L7/099 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B2201/0266 ,  H03J2200/10

Abstract: A variable frequency oscillator comprising: an oscillatory circuit for generating a periodic output dependant on the capacitance between a first node and a second node of the circuit, and having a capacitative element connected between the first node and the second node; the capacitative element comprising: a variable capacitance unit, the capacitance of which is variable for varying the frequency of the output; and a plurality of trimming capacitances each being selectively connectable in parallel with the variable capacitance unit between the first node and the second node to trim the frequency of the output.

公开(公告)号：EP1213836A1

公开(公告)日：2002-06-12

申请号：EP01126887.7

申请日：2001-11-12

Applicant: Infineon Technologies AG

Inventor： Traub, Johann

IPC: H03J5/24 ,  H03B5/12

CPC classification number: H03J5/244 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: Eine Oszillatorschaltung mit zuschaltbaren Kapazität (C3, C4) ermöglicht die Umschaltung des Oszillators zwischen zumindest zwei Frequenzen. Zum Umschalten ist eine Schalteinheit (TL) vorgesehen, welche einen ersten Schalter (T3) umfaßt, welcher zwischen die schaltbaren Kapazitäten (C3, C4) geschaltet ist sowie weitere Schalter (T1, T2), die gegen einen Versorgungsspannungsanschluß (GND) geschaltet sind. Gegenüber herkömmlichen umschaltbaren Oszillatoren weist die beschriebene Schaltung den Vorteil auf, daß im eingeschalteten Zustand der zuschaltbaren Kapazitäten (C3, C4) ein besonders geringer Durchlaßwiderstand, und dennoch im ausgeschalteten Zustand besonders kleine parasitäre Kapazitäten wirksam sind. Die beschriebene Oszillatorschaltung ist mit besonders geringer Chipfläche realisierbar, da die Schalter (T1, T2, T3) in einer gemeinsamen Transistorstruktur mit gemeinsamen Steueranschluß (G) integrierbar sind. Die Oszillatorschaltung ist besonders für Mobilfunkanwendungen geeignet.

Abstract translation: 振荡器的主芯由变容二极管（D1，D2）和由电感（L1，L2）与电容器（C，C2）形成的振荡电路构成。 两个另外的电容器（C3，C4）连接到输出端子（A1，A2）。 它们的其他端子可以通过MOS晶体管（T3）或MOS晶体管（T1，T2）直接连接在一起，以改变振荡器频率。