公开(公告)号：US09441119B2

公开(公告)日：2016-09-13

申请号：US13072860

申请日：2011-03-28

Applicant: Nikhil D. Kalyankar ,  Nitin Kumar ,  Zhi-Wen Sun

Inventor： Nikhil D. Kalyankar ,  Nitin Kumar ,  Zhi-Wen Sun

IPC: C08L71/02 ,  C08L1/28 ,  C08L83/02 ,  C09D7/12 ,  B82Y30/00 ,  C03C1/00 ,  C03C17/02 ,  C23C18/12 ,  C09D1/00 ,  C09D5/00 ,  C08K5/00 ,  C08L1/02

CPC classification number: C09D7/1266 ,  B82Y30/00 ,  C03C1/008 ,  C03C17/02 ,  C03C2203/30 ,  C03C2204/08 ,  C03C2218/113 ,  C08K5/0008 ,  C08L1/02 ,  C08L1/284 ,  C08L71/02 ,  C08L2201/00 ,  C09D1/00 ,  C09D5/00 ,  C09D7/65 ,  C09D7/67 ,  C23C18/122 ,  C23C18/1245 ,  C23C18/1254 ,  C23C18/1295

Abstract: Embodiments of the invention generally relate to methods and compositions for forming conformal coatings on textured substrates. More specifically, embodiments of the invention generally relate to sol-gel processes and sol-gel compositions for forming low refractive index conformal coatings on textured transparent substrates. In one embodiment a method of forming a conformal coating on a textured glass substrate is provided. The method comprises coating the textured glass substrate with a sol-gel composition comprising a solidifier. It is believed that use of the solidifier expedites the sol-gel transition point of the sol-gel composition leading to more conformal deposition of coatings on textured substrates.

Abstract translation: 本发明的实施方案一般涉及在纹理化基底上形成保形涂层的方法和组合物。 更具体地，本发明的实施方案一般涉及在纹理透明基底上形成低折射率共形涂层的溶胶 - 凝胶法和溶胶 - 凝胶组合物。 在一个实施例中，提供了在纹理化玻璃基板上形成共形涂层的方法。 该方法包括用包含固化剂的溶胶 - 凝胶组合物涂覆织构化的玻璃基底。 据信，使用固化剂可加速溶胶 - 凝胶组合物的溶胶 - 凝胶转变点，从而导致涂层在纹理化基材上的更为适形的沉积。

公开(公告)号：US09417987B2

公开(公告)日：2016-08-16

申请号：US12137683

申请日：2008-06-12

Applicant: Basu Vaidyanathan ,  Kavana Nandikur Bhat ,  Nitin Kumar

Inventor： Basu Vaidyanathan ,  Kavana Nandikur Bhat ,  Nitin Kumar

IPC: G06F9/44 ,  G06F11/36

CPC classification number: G06F11/362

Abstract: A load store advisory program sets a breakpoint within a load-store sequence of a program, determines if the breakpoint will cause unexpected behavior, and generates a warning if it is determined that the breakpoint will cause unexpected behavior. The unexpected behavior may be the result of setting a breakpoint within a load-store sequence that, because of the breakpoint, will repeatedly fail.

Abstract translation: 加载存储咨询程序在程序的加载存储序列中设置断点，确定断点是否会导致意外行为，如果确定断点将导致意外行为，则会生成警告。 意外的行为可能是在加载存储序列中设置断点的结果，因为断点将会重复出现故障。

公开(公告)号：US08995446B2

公开(公告)日：2015-03-31

申请号：US12643036

申请日：2009-12-21

Applicant: Keyur P. Patel ,  Nitin Kumar

Inventor： Keyur P. Patel ,  Nitin Kumar

IPC: H04L12/26 ,  H04L12/715 ,  H04L12/46 ,  H04L12/751 ,  H04L12/741

CPC classification number: H04L45/04 ,  H04L12/4641 ,  H04L45/02 ,  H04L45/54

Abstract: In one embodiment, a router may store a “neighbor table” for storing the router's Border Gateway Protocol (BGP) neighbors. Each neighbor corresponds to a virtual routing and forwarding (VRF) instance and associated VRF identifier (ID), and the neighbor table indexes the BGP neighbors according to their respective VRF ID. In response to initiating a BGP update generation for a BGP table having BGP network entries, each entry having an associated VRF ID that indicates to which VRF instance the BGP entry is to be advertised, a single lookup operation for each BGP entry is performed into the neighbor table based on the corresponding VRF ID of each BGP entry to determine a corresponding VRF update group of indexed BGP neighbors to which each BGP entry is to be advertised. Accordingly, a shared BGP update may be generated for each VRF update group for the initiated BGP update generation.

Abstract translation: 在一个实施例中，路由器可以存储用于存储路由器的边界网关协议（BGP）邻居的“邻居表”。 每个邻居对应虚拟路由和转发（VRF）实例和相关联的VRF标识符（ID），邻居表根据各自的VRF ID对BGP邻居进行索引。 响应发起具有BGP网络条目的BGP表的BGP更新生成，每个条目具有指示向哪个VRF实例发布BGP条目的关联VRF ID，每个BGP条目的单个查找操作被执行到 邻居表根据每个BGP条目的相应VRF ID，确定每个BGP条目要通告的索引BGP邻居的相应VRF更新组。 因此，可以针对发起的BGP更新生成的每个VRF更新组生成共享的BGP更新。

公开(公告)号：US20150042242A1

公开(公告)日：2015-02-12

申请号：US14313203

申请日：2014-06-24

Applicant: Nitin Kumar ,  Markus Ziegler ,  Naveen Tumula ,  Thomas Schalton

Inventor： Nitin Kumar ,  Markus Ziegler ,  Naveen Tumula ,  Thomas Schalton

IPC: H02M3/24 ,  H05B33/08

CPC classification number: H05B33/0815 ,  H02M3/24 ,  H02M3/33507 ,  H02M2001/0025 ,  H05B33/08 ,  Y02B20/348

Abstract: A driver port that provides selectable output currents based on connections thereto, and a driver including the same, is provided. A plurality of shunt resistors are connected in series between a negative output of a driver and a ground. A driver port having a plurality of connection points is provided, each respective connection point connected to a different connection between two of the plurality of shunt resistors. A load including one or more solid state light sources is capable of being connected between one of the connection points of the driver port and a positive output of the driver.

Abstract translation: 提供了一种驱动器端口，其基于与其连接提供可选择的输出电流，以及包括该驱动器端口的驱动器。 多个分流电阻器串联连接在驱动器的负输出和地之间。 提供具有多个连接点的驱动器端口，每个相应的连接点连接到多个分流电阻器中的两个之间的不同连接。 包括一个或多个固态光源的负载能够连接在驱动器端口的一个连接点和驱动器的正输出之间。

公开(公告)号：US20150042227A1

公开(公告)日：2015-02-12

申请号：US14312919

申请日：2014-06-24

Applicant: Nitin Kumar ,  Markus Ziegler

Inventor： Nitin Kumar ,  Markus Ziegler

IPC: H05B33/08

CPC classification number: H05B33/0815 ,  H02M3/24 ,  H02M3/33507 ,  H02M2001/0025 ,  H05B33/08 ,  Y02B20/348

Abstract: A bi-level current configurable driver is provided. The driver includes a feedback circuit, a driver circuit providing a driver signal to a half bridge inverter, and a step-dim interface coupled to a first alternating current input line, a second alternating current input line, and a neutral line, providing voltage to the driver circuit. The driver also includes a first feedforward circuit coupled to the step-dim interface, where the first feedforward circuit receives a first signal from the step-dim interface based on the states of the first alternating current input line, the second alternating current input line, and the neutral line. In a first state, the driver provides full current to a load, and in a second state, the driver provides less than full current to the load.

Abstract translation: 提供双电平电流可配置驱动器。 驱动器包括反馈电路，向半桥逆变器提供驱动器信号的驱动器电路，以及耦合到第一交流输入线，第二交流输入线和中性线的阶梯形接口，提供电压到 驱动电路。 所述驱动器还包括耦合到所述渐变接口的第一前馈电路，其中所述第一前馈电路基于所述第一交流电输入线，所述第二交流输入线，所述第二交流输入线， 和中性线。 在第一状态下，驱动器向负载提供全电流，而在第二状态下，驱动器向负载提供小于满电流。

公开(公告)号：US08953599B1

公开(公告)日：2015-02-10

申请号：US13539120

申请日：2012-06-29

Applicant: Colby Barth ,  Nischal Sheth ,  Nitin Kumar ,  Xuefei Zhang ,  Panning Huang ,  Raghavendra Mallya ,  Bhasker R. Allam ,  Krishna Narayanaswamy ,  Dongyi Jiang ,  Tsai-Zong Lin ,  Jiaxiang Su

Inventor： Colby Barth ,  Nischal Sheth ,  Nitin Kumar ,  Xuefei Zhang ,  Panning Huang ,  Raghavendra Mallya ,  Bhasker R. Allam ,  Krishna Narayanaswamy ,  Dongyi Jiang ,  Tsai-Zong Lin ,  Jiaxiang Su

IPC: H04L12/28 ,  H04L12/751

CPC classification number: H04L45/02 ,  H04L45/40 ,  H04L45/586 ,  H04L45/60

Abstract: In general, techniques are for providing a direct forwarding path between virtual routers within a single virtualized routing system. In one example, a method includes combining forwarding information from a plurality of virtual routers into collapsed forwarding information that comprises one or more direct forwarding paths between the respective virtual routers. The method also includes determining a direct forwarding path to an egress interface of the second virtual router, in response to receiving a network packet at an ingress interface of a first virtual router. The method also includes forwarding the network packet from the ingress interface of the first virtual router to the egress interface of the second virtual router using the direct forwarding path, wherein the network packet traverses a switch fabric directly from the ingress interface of the first virtual router to the egress interface of the second virtual router.

Abstract translation: 通常，技术用于在单个虚拟化路由系统内的虚拟路由器之间提供直接转发路径。 在一个示例中，一种方法包括将来自多个虚拟路由器的转发信息组合成包括在各个虚拟路由器之间的一个或多个直接转发路径的折叠转发信息。 响应于在第一虚拟路由器的入口接口处接收到网络分组，该方法还包括确定到第二虚拟路由器的出口接口的直接转发路径。 该方法还包括使用直接转发路径将网络分组从第一虚拟路由器的入口接口转发到第二虚拟路由器的出口接口，其中网络分组从第一虚拟路由器的入口接口直接穿越交换结构 到第二虚拟路由器的出口接口。

公开(公告)号：US08937437B2

公开(公告)日：2015-01-20

申请号：US13917414

申请日：2013-06-13

Applicant: Nitin Kumar ,  Shashank Bakre

Inventor： Nitin Kumar ,  Shashank Bakre

IPC: H05B41/36 ,  H05B37/02

CPC classification number: H05B41/2988

Abstract: A ballast comprises an inverter circuit for providing an oscillating current signal for energizing the at least one lamp. The inverter circuit comprises a first switching component and a second switching component each having a collector terminal, a base terminal, and an emitter terminal. And, each switching component is configured for alternately operating between a conductive state and a non-conductive state. A first collector-emitter circuit is connected between the collector terminal and the emitter terminal of the first switching component, wherein the first collector-emitter circuit has a first resistance of zero or more Ohms. A second collector-emitter circuit is connected between the collector terminal and the emitter terminal of the second switching component, wherein the second collector-emitter circuit has a second resistance of zero or more Ohms and the first resistance and the second resistance are unequal.

Abstract translation: 镇流器包括用于提供用于激励至少一个灯的振荡电流信号的逆变器电路。 逆变器电路包括具有集电极端子，基极端子和发射极端子的第一开关部件和第二开关部件。 并且，每个开关部件被配置为在导通状态和非导通状态之间交替地操作。 第一集电极 - 发射极电路连接在第一开关部件的集电极端子和发射极端子之间，其中第一集电极 - 发射极电路具有零个或更多欧姆的第一电阻。 第二集电极 - 发射极电路连接在第二开关部件的集电极端子和发射极端子之间，其中第二集电极 - 发射极电路具有零欧姆以上的第二电阻，第一电阻和第二电阻不相等。

公开(公告)号：US08890594B1

公开(公告)日：2014-11-18

申请号：US13938244

申请日：2013-07-10

Applicant: Surendra Kumar Tadi ,  Nitin Kumar Jaiswal

Inventor： Surendra Kumar Tadi ,  Nitin Kumar Jaiswal

IPC: H03K3/36 ,  H03K3/037

CPC classification number: H03K3/0375

Abstract: A system for synchronizing a functional reset between first and second clock domains that operate on first and second clock signals, respectively. The system includes first, second and third synchronizer flip-flops that operate on the second clock signal. The first synchronizer flip-flop receives a functional reset signal generated by the first clock domain at its reset terminal and generates a low output signal. The low output signal causes the second synchronizer flip-flop and subsequently the third synchronizer flip-flop to generate low output signals at positive edges of the second clock signal. The low output signal generated by the third synchronizer flip-flop is used to reset the second clock domain.

Abstract translation: 一种用于在第一和第二时钟域之间分别对第一和第二时钟信号进行功能复位同步的系统。 该系统包括在第二时钟信号上工作的第一，第二和第三同步器触发器。 第一同步触发器在其复位端接收由第一时钟域产生的功能复位信号，并产生低输出信号。 低输出信号引起第二同步触发器，随后第三同步触发器在第二时钟信号的正边沿产生低输出信号。 由第三同步触发器产生的低输出信号用于复位第二时钟域。

公开(公告)号：US08837479B1

公开(公告)日：2014-09-16

申请号：US13533967

申请日：2012-06-27

Applicant: Nitin Kumar ,  Nischal Sheth ,  Satish Ramachandran ,  Robert Kebler ,  Maciek Konstantynowicz

Inventor： Nitin Kumar ,  Nischal Sheth ,  Satish Ramachandran ,  Robert Kebler ,  Maciek Konstantynowicz

IPC: H04L12/24 ,  H04L12/28

CPC classification number: H04L45/28 ,  H04L12/1877 ,  H04L45/24

Abstract: A packet-forwarding integrated circuit includes a control logic module and a selector block configured to produce a value indicating an incoming interface associated with a multicast data stream that meets stream health requirements, wherein the multicast data stream is one of a plurality of redundant multicast data streams each received on different incoming interfaces, wherein based on the value produced by the selector block the control logic module outputs data packets of the multicast data stream that meets stream health requirements received on the incoming interface, and discards data packets of other multicast data streams received on other incoming interfaces not indicated by the selector block. In response to detecting that a quality of one of the redundant multicast data streams has fallen below a configured threshold, the control logic automatically rewrites the selector block to forward a different one of the redundant multicast data streams.

Abstract translation: 分组转发集成电路包括控制逻辑模块和选择器块，其被配置为产生指示与满足流健康要求的多播数据流相关联的输入接口的值，其中多播数据流是多个冗余多播数据之一 每个在不同输入接口上接收的流，其中，基于由选择器块产生的值，控制逻辑模块输出满足在入接口上接收的流健康要求的多播数据流的数据分组，并丢弃其他多播数据流的数据分组 在未由选择器块指示的其他输入接口上接收。 响应于检测到冗余多播数据流中的一个的质量已经低于配置的阈值，则控制逻辑自动重写该选择器块以转发不同的冗余多播数据流。

公开(公告)号：US08836240B2

公开(公告)日：2014-09-16

申请号：US13539402

申请日：2012-06-30

Applicant: Nitin Kumar ,  Markus Ziegler ,  Robert Martin ,  Shashank Bakre

Inventor： Nitin Kumar ,  Markus Ziegler ,  Robert Martin ,  Shashank Bakre

IPC: H05B37/02

CPC classification number: H05B41/2883 ,  H05B41/36

Abstract: A ballast for energizing a lamp at a lighting level selected from a plurality of lamp lighting levels. The ballast includes a buck converter circuit configured to receive a DC voltage signal having a substantially constant magnitude. The buck converter circuit has a duty cycle for generating a lamp voltage output signal from the DC voltage signal. The lamp voltage output signal has a magnitude that is varied by the duty cycle to energize the lamp at the plurality of lamp lighting levels. A controller is configured to receive a dim input signal indicative of the selected lamp lighting level and to provide a control signal to the buck converter circuit as a function of the dim input signal. The control signal indicates a particular duty cycle corresponding to a lamp voltage output signal having a magnitude for energizing the lamp at the selected lamp lighting level.

Abstract translation: 一种镇流器，用于在从多个灯照明水平中选择的照明水平上激发灯。 镇流器包括被配置为接收具有基本恒定幅度的DC电压信号的降压转换器电路。 降压转换器电路具有用于从直流电压信号产生灯电压输出信号的占空比。 灯电压输出信号具有由占空比变化的大小，以在多个灯照明电平下给灯供电。 控制器被配置为接收指示所选择的灯点亮电平的暗淡输入信号，并且作为所述暗淡输入信号的函数向所述降压转换器电路提供控制信号。 控制信号表示对应于灯电压输出信号的特定占空比，该灯电压输出信号具有在选定的灯照明电平下对灯进行激励的幅度。