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公开(公告)号：US10817200B2
公开(公告)日：2020-10-27
申请号：US15794008
申请日：2017-10-26
Applicant: Silicon Laboratories Inc.
Inventor： Partha Sarathy Murali , Venkata Siva Prasad Pulagam , Sailaja Dharani Naga Sankabathula , Venkat Rao Gunturu , Subba Reddy Kallam
Abstract: A flash memory controller is operative to receive serial commands and command arguments. A flash permissions table identifies each segment of flash memory as READ_ONLY, PRIVATE_R/W or OPEN_R/W. A memory interface is coupled to a flash memory and also the flash permissions table. When a flash memory write operation is received with an associated command argument corresponding to an address indicated as READ_ONLY in the flash permissions table and a DISABLE_WR_REG is true, the write operation is ignored or converted into a non-write command and issued to the flash memory.
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公开(公告)号：US20200336319A1
公开(公告)日：2020-10-22
申请号：US16918342
申请日：2020-07-01
Applicant: Silicon Laboratories Inc.
Inventor： Partha Sarathy MURALI , Ajay MANTHA , Nagaraj Reddy ANAKALA , Subba Reddy KALLAM , Venkat MATTELA
IPC: H04L12/12
Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.
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公开(公告)号：US20200309891A1
公开(公告)日：2020-10-01
申请号：US16364482
申请日：2019-03-26
Applicant: Silicon Laboratories Inc.
Inventor： Joel Kauppo , Sauli Johannes Lehtimaki , Antonio Torrini
Abstract: An optimized system and method for determining an angle of arrival or angle of departure is disclosed. A coarse pre-search is performed to identify the general location of the incoming signal. Based on this information, a high-resolution search is performed at the general location identified in the coarse pre-search. This multi-stage approach significantly reduces the number of computations that must be performed by the device, and also reduces the amount of memory that is required to store the results of the computations. For example, a full scan may require the computations to be performed over 32,000 times. Through use of this approach, the number of computations may be reduced by over 97%. This is a similar reduction in computation time and in the amount of memory consumed by this method.
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公开(公告)号：US10785016B2
公开(公告)日：2020-09-22
申请号：US16044727
申请日：2018-07-25
Applicant: Silicon Laboratories Inc.
Inventor： DeWitt Clinton Seward
Abstract: A system and method for determining whether a cryptographic system is being observed for power consumption analysis in an attempt to decipher secret keys. The system comprises a first external connection to receive an input voltage, an internal voltage regulator with an external capacitor to produce the desired voltage for the cryptographic system. The internal voltage regulator typically includes a switch that passes current from the first external connection to the external capacitor. By monitoring the frequency at which the switch is activated, it is possible to detect that an external voltage is being applied to the external capacitor. This external voltage is typically used to perform SPA or DPA operations. Thus, the cryptographic system may cease performing any encryption or decryption operations if an external voltage is detected.
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公开(公告)号：US10778230B2
公开(公告)日：2020-09-15
申请号：US16661049
申请日：2019-10-23
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
Abstract: A method for reducing deterministic jitter in a clock generator includes providing a load current through a regulated voltage node to a circuit responsive to a divide ratio. The method includes providing an auxiliary current through the regulated voltage node. The auxiliary current has a first current level during a first period corresponding to a first value of the divide ratio and the auxiliary current has a second current level during a second period corresponding to a second value of the divide ratio.
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Patent Agency Ranking
146.发明授权公开(公告)号：US10763781B2
公开(公告)日：2020-09-01
申请号：US16023001
申请日：2018-06-29
Applicant: SILICON LABORATORIES INC.
Inventor： Thomas Edward Voor , Jeffrey A. Tindle , Euisoo Yoo , Wei Shen
Abstract: A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.
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公开(公告)号：US10756823B2
公开(公告)日：2020-08-25
申请号：US15975307
申请日：2018-05-09
Applicant: Silicon Laboratories Inc.
Inventor： Carlos Briseno-Vidrios , Michael R. May , Patrick J. de Bakker
Abstract: A first die is communicatively coupled to a first isolation communication channel and a second isolation communication channel and configured to send a first heartbeat signal over the first isolation communication channel. A second die is coupled to receive the first heartbeat signal from the first die over the first isolation communication channel and to supply a second heartbeat signal to the second isolation communication channel. The first die enters a first die low power mode responsive to detecting an absence of the second heartbeat signal and the second die enters a second die low power mode responsive to detecting an absence of the first heartbeat signal. The first and second die use low power oscillators in the low power mode to supply the heartbeat signals.
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148.发明授权公开(公告)号：US10742199B2
公开(公告)日：2020-08-11
申请号：US16416462
申请日：2019-05-20
Applicant: SILICON LABORATORIES INC.
Inventor： Thomas S. David , Wasim Quddus
IPC: H03K17/24 , H03K3/012 , H03K3/3562 , H03K3/289 , H03K3/356
Abstract: A semiconductor device that retains a state of a data storage element during a power reduction mode including supply rails and voltages, and a storage latch and a retention latch both powered by retention supply voltage that remains energized during a power reduction mode. The storage latch and the retention latch are both coupled to a retention node that is toggled between first and second states before entering the power reduction mode. The toggling causes the storage latch to latch the state of the data storage element during the normal mode, and the retention node enables the storage element to hold the state during the power reduction mode. The retention latch includes a retention transistor and a retention inverter powered by the retention supply voltage. The retention inverter keeps the retention transistor turned on and the retention transistor holds the state of the retention node during the power reduction mode.
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149.发明授权公开(公告)号：US10742185B1
公开(公告)日：2020-08-11
申请号：US16367908
申请日：2019-03-28
Applicant: Silicon Laboratories Inc.
Inventor： Wentao Li , Guner Arslan , Yan Zhou
Abstract: A wireless receiver including a gain network that adjusts a gain of a received wireless signal and provides an RF signal, a level detector that provides a level indication while a strength of the RF signal is at least an RF level threshold, a timing system that provides a timing value indicative of a total amount of time that the level indication is provided during a timing window, a gain up disable circuit that provides a gain up disable signal when the timing value reaches a low threshold, a blocker strength detect circuit that provides a gain down request signal when the timing value reaches a high threshold, and an AGC circuit that does not increase the gain of the gain network while the gain up disable signal is provided, and that allows a reduction of the gain of the gain network while the gain down request signal is provided.
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公开(公告)号：US10740498B2
公开(公告)日：2020-08-11
申请号：US15888415
申请日：2018-02-05
Applicant: Silicon Laboratories Inc.
Inventor： Sriram Mudulodu
IPC: G06F21/81 , H04W52/02 , G06F1/3287 , G06F21/55 , G06F9/4401 , G06F21/57
Abstract: The present invention relates to a method and system of secure wakeup in a communication system. The method comprises: transmitting a predetermined wakeup code by a wakeup transmitter of a first node to a wakeup receiver of a second node using a first communication link; establishing a protocol for future wakeup codes periodically between the first node and the second node using a second communication link; wherein the wakeup code is updated based on at least one of: the protocol for future wakeup codes, a first function of time defined by protocol for future wakeup codes, a second function of number of wakeups defined by protocol for future wakeup codes; comparing the wakeup code received by the second node with the wakeup code sent by the first node; and if the wakeup code received by the second node matches a template wakeup code derived from a protocol for future wakeup codes, then the receiver wakes up; otherwise the receiver does not wakeup.
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