公开(公告)号：JPS5487145A

公开(公告)日：1979-07-11

申请号：JP15511377

申请日：1977-12-23

Applicant: FUJITSU LTD

Inventor： SAWADA TAKETOYO ,  HANADA AKIO ,  MITA TERUYOSHI ,  HOSHI FUMIO ,  SATOU MASAO

IPC: H04L1/00 ,  G06F9/00 ,  G06F11/00 ,  G06F11/22 ,  G06F11/28

Abstract: PURPOSE:To detect the logic error of hardware/software, by investigating failure through the display and memory of the condition of the desired parts at the desired time point, without stopping the operation of unit. CONSTITUTION:The data A set in advance, signal B to be compared, and signal C desired to display or transfer to memory at the agreement of comparison, are inputted. When the data A and the signal B are compared 3 and if they are in agreement, FF8 is set and the interrupt signal to program is delivered. Next, the value at the time point of comparison agreement of the signal C is stored in the display register 4 with the AND gate 9. The content of the register 4 is displayed 5, and the transfer instruction from program to the transfer circuit 6 is made with the interrupt signal as mentioned above and it is memorized in the memory. Thus, without stopping the operation of unit, arbitrary signal group selected in advance when the agreement of comparison is detected is stored and displayed, and it is memorized in conventional memory or registers.

公开(公告)号：JPS5487130A

公开(公告)日：1979-07-11

申请号：JP15511777

申请日：1977-12-23

Applicant: FUJITSU LTD

Inventor： SAWADA TAKETOYO ,  HANADA AKIO ,  MITA TERUYOSHI ,  HOSHI FUMIO ,  SATOU MASAO

IPC: G06F7/00 ,  G06F9/00 ,  G06F9/34 ,  G06F9/46 ,  G06F9/48 ,  G06F13/00

Abstract: PURPOSE:To remarkably reduce the instruction execution time, by providing duplicated selection circuit between conventional register group and operation circuit, selecting registers, and feeding data to the operation circuit from the register after being read out. CONSTITUTION:Operation is made by inputting the data of two conventional registers in a plurality of conventional registers 11 to the operation circuit 1. In this case, the selector circuit 12 duplicated is provided between the conventional register group 11 and the circuit 13, and registers are selected from the conventional register group 11 by taking the interrupt program level as the address information. The data is made in readout state from the selected register, and the readout data is fed to the circuit 13 after selecting the data with the circuit 12. Thus, the instruction execution time can remarkably be reduced.

公开(公告)号：JPS53136924A

公开(公告)日：1978-11-29

申请号：JP5180777

申请日：1977-05-06

Applicant: FUJITSU LTD

Inventor： HANADA AKIO ,  MITA TERUYOSHI ,  SAITOU KOUICHI ,  OGITA TAKAHIKO

IPC: G11C11/41 ,  G11C7/00 ,  G11C7/22 ,  G11C11/406

Abstract: PURPOSE:To minimize the deterioration of the using efficiency for the memory through refreshing by having a simultaneous execution of both the access request and the refresh request to the static memory part when a refresh request exists.

公开(公告)号：JPS5315723A

公开(公告)日：1978-02-14

申请号：JP8998876

申请日：1976-07-28

Applicant: FUJITSU LTD

Inventor： SUZUKI YOUICHI ,  MITA TERUYOSHI ,  SUGIZAKI HARUO ,  SATOU MASAO ,  HIWATARI AKITO

IPC: G06F9/46 ,  G05B19/02 ,  G06F3/00 ,  G06F13/37

Abstract: PURPOSE:To secure an easy increase of units as well as to shorten the time required for the recogntion of a reception signal by having a serial connection of the selection request signal line between each individual unit and the common unit via a gate means.

公开(公告)号：JPS5311545A

公开(公告)日：1978-02-02

申请号：JP8585076

申请日：1976-07-19

Applicant: FUJITSU LTD

Inventor： SAWADA TAKETOYO ,  HANADA AKIO ,  MITA TERUYOSHI ,  HOSHI TADAO ,  SEKIKAWA FUMIO

IPC: G06F11/00 ,  G06F1/04

Abstract: PURPOSE:To detect the clock fault at an early time by carrying out a clock fault detection in a digital way without using any transistor, resistance, condenser, and other parts.