公开(公告)号：WO2004047328A1

公开(公告)日：2004-06-03

申请号：PCT/EP2002/012815

申请日：2002-11-15

Applicant: TELECOM ITALIA S.P.A. ,  STMICROELECTRONICS S.R.L. ,  ETTORRE, Donato ,  GRAZIANO, Maurizio ,  MELIS, Bruno ,  FINOTELLO, Andrea ,  OSSOLI, Alessandro ,  RUSCITTO, Alfredo

Inventor： ETTORRE, Donato ,  GRAZIANO, Maurizio ,  MELIS, Bruno ,  FINOTELLO, Andrea ,  OSSOLI, Alessandro ,  RUSCITTO, Alfredo

IPC: H04B1/707

CPC classification number: H04B1/7093 ,  H04B1/7113 ,  H04B1/7117 ,  H04B2201/70707

Abstract: A spread spectrum digital communication receiver, of the type comprising an input memory buffer (16) for storing samples of an input signal (y(k)) and a code generator circuit (30) for generating a re-generated user code, incorporates a device (24) for the estimation of a channel delay profile comprises: a basic correlator (32) having a first input (41) for sequentially reading from a memory location of the input memory buffer (16) a plurality of samples of the input signal (y(k)), a second input (43) for receiving from the code generator circuit (30) a re-generated user code, and an output terminal for generating, by means of a correlation operation between the plurality of samples of the input signal and the regenerated user code, a first value of the channel delay profile energy (DP(1)); and a memory controller circuit (36) for addressing said the memory buffer (16) so that the first input (41) of the basic correlator (32) is successively fed with the content of several memory locations of the memory buffer (16), each addressing operation corresponding to a new correlation operation of the basic correlator (32) for the computation of a new value of the channel delay profile energy (DP(l)).

Abstract translation: 包括用于存储输入信号（y（k））的采样的输入存储器缓冲器（16）和用于生成重新生成的用户代码的代码生成器电路（30）的类型的扩展频谱数字通信接收机包括一个 用于估计信道延迟分布的装置（24）包括：基本相关器（32），具有用于从输入存储器缓冲器（16）的存储器位置顺序读取输入信号的多个样本的第一输入端（41） （y（k）），用于从码发生器电路（30）接收重新生成的用户码的第二输入端（43），以及输出端子，用于通过所述多个采样 输入信号和再生用户代码，信道延迟分布能量（DP（1））的第一值; 以及存储器控制器电路（36），用于寻址所述存储器缓冲器（16），使得所述基本相关器（32）的第一输入端（41）被连续地馈送到所述存储器缓冲器（16）的若干存储器位置的内容， 每个寻址操作对应于用于计算信道延迟分布能量（DP（1））的新值的基本相关器（32）的新的相关操作。

公开(公告)号：WO2004047326A1

公开(公告)日：2004-06-03

申请号：PCT/EP2002/012813

申请日：2002-11-15

Applicant: TELECOM ITALIA S.P.A. ,  STMICROELECTRONICS S.R.L. ,  ETTORRE, Donato ,  GRAZIANO, Maurizio ,  MELIS, Bruno ,  FINOTELLO, Andrea ,  RUSCITTO, Alfredo

Inventor： ETTORRE, Donato ,  GRAZIANO, Maurizio ,  MELIS, Bruno ,  FINOTELLO, Andrea ,  RUSCITTO, Alfredo

IPC: H04B1/707

CPC classification number: H04B1/7085 ,  H04B1/70757

Abstract: A method for the synchronization of a digital telecommunication receiver comprises the steps of: - storing a plurality of consecutive samples E-l, E, M, L, L+1 of an incoming spread spectrum signal in a delay line 56; - determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a first digitally controlled interpolator 26, an interpolated early sample (e) anticipating an optimal sampling time instant; - determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a second digitally controlled interpolator 24, an interpolated middle sample (m) corresponding to the optimal sampling time instant; - determining by interpolation between consecutive samples of the incoming spread spectrum signal, by means of a third digitally controlled interpolator 28, an interpolated late sample (1) delayed with respect to the optimal sampling time instant; - calculating an error signal ξ as the difference between the energy of the symbols computed from the interpolated early sample (e) and the interpolated late (1) sample; - extracting the sign of the error signal ξ - accumulating the sign of the error signal ξ for the generation of control signals S E , S M , S L for controlling the interpolation phases of the digitally controlled interpolators used for determining the interpolated early (e), middle (m) and late (l) samples. The accumulated value has a positive saturation value of +4 and a negative saturation value of 4.

Abstract translation: 一种用于数字电信接收机同步的方法包括以下步骤： - 在延迟线56中存储输入扩频信号的多个连续样本E-1，E，M，L，L + 1; - 通过第一数字控制内插器26来确定进入的扩频信号的连续采样之间的插值，预测最佳采样时刻的内插早期采样（e）; - 通过第二数字控制内插器24确定进入的扩频信号的连续采样之间的插值，对应于最佳采样时刻的内插中间采样（m）; - 通过第三数字控制内插器28确定进入的扩展频谱信号的连续样本之间的内插，相对于最佳采样时刻延迟的内插后采样（1）; 将误差信号xi计算为从插值的早期样本（e）和插值的深（1）样本计算的符号的能量之间的差; - 提取误差信号xi的符号 - 累积误差信号xi的符号以产生控制信号S> E <，S> M <，S> L <用于控制用于数字控制内插器的内插相位 确定内插的早期（e），中（m）和晚（l）样本。 累积值的正饱和值为+4，负饱和值为4。

公开(公告)号：WO2004027965A1

公开(公告)日：2004-04-01

申请号：PCT/IT2002/000602

申请日：2002-09-20

Applicant: STMICROELECTRONICS S.R.L. ,  PIDUTTI, Albino ,  ADRAGNA, Claudio ,  FAGNANI, Mauro

Inventor： PIDUTTI, Albino ,  ADRAGNA, Claudio ,  FAGNANI, Mauro

IPC: H02M1/00

CPC classification number: H02M1/4225 ,  Y02B70/126

Abstract: A power factor correction device for switching power supplies is described, which comprises a converter (20) and a control device (100;200;300) coupled with said converter (20) in such a way as to obtain from a input network alternated voltage (Vin) a direct regulated voltage (Vout) at the output terminal. The converter (20) comprises a power transistor (M) and the control device (100;200;300) comprises an error amplifier (3) having in input at the inverting terminal a first signal (Vr) proportional to said regulated voltage (Vout) at at the non-inverting terminal a voltage reference (Vref), at least one capacitor (C) having a first terminal and a second terminal which are coupled respectively with the inverting terminal and the output terminal (31) of the error amplifier (3) and a driving circuit (4-6) of said power transistor (M) which is coupled with the second terminal of said capacitor (C). The control device (100;200;300) comprises interruption means (SW)placed between the output terminal (31) of said error amplifier (3) and said driving circuit (4-6) for at least one time period (T) lower than the time period (Tciclo) in which said control device (100; 200; 300) is operative.

Abstract translation: 描述了用于开关电源的功率因数校正装置，其包括与所述转换器（20）耦合的转换器（20）和控制装置（100; 200; 300），以便从输入网络获得交替电压 （Vin）在输出端子处的直接调节电压（Vout）。 所述转换器（20）包括功率晶体管（M），所述控制装置（100; 200; 300）包括误差放大器（3），所述误差放大器（3）在所述反相端子处具有与所述调节电压（Vout ）在非反相端子处具有电压基准（Vref），至少一个具有第一端子和第二端子的电容器（C），其分别与误差放大器的反相端子和输出端子（31）耦合 3）和与所述电容器（C）的第二端子耦合的所述功率晶体管（M）的驱动电路（4-6）。 控制装置（100; 200; 300）包括放置在所述误差放大器（3）的输出端（31）和所述驱动电路（4-6）之间的至少一个时间段（T）较低的中断装置（SW） 比所述控制装置（100; 200; 300）可操作的时间段（Tciclo）高。

公开(公告)号：WO2004010569A1

公开(公告)日：2004-01-29

申请号：PCT/IT2002/000478

申请日：2002-07-19

Applicant: STMICROELECTRONICS S.R.L. ,  FAGNANI, Mauro ,  PIDUTTI, Albino ,  ADRAGNA, Claudio

Inventor： FAGNANI, Mauro ,  PIDUTTI, Albino ,  ADRAGNA, Claudio

IPC: H02M1/00

CPC classification number: H02M1/36 ,  H02M3/335 ,  H02M2001/0006

Abstract: The present invention refers to a starting circuit for switching power supplies (SMPS), to a switching power supply comprising a starting circuit )and an integrated circuit of a switching power supply. In an embodiment thereof the starting circuit (13) for switching power supplies having a first supply voltage (Vin) coming from a first terminal and a second supply voltage (Vcc) coming from a second terminal and a third tenninal (30); said starting circuit comprises: a first current path between said first terminal and said third terminal (30); a second current path between said first tenninal and said second terminal; a third current path between said second terminal and said third terminal (30); a two-way voltage regulator (M3, Dz2, R5, R6) placed along said second current path.

Abstract translation: 本发明涉及用于切换电源（SMPS）的起动电路，包括起动电路的开关电源）和开关电源的集成电路。 在其实施例中，用于切换来自第一端子的第一电源电压（Vin）和来自第二端子和第三端子（30）的第二电源电压（Vcc）的电源的启动电路（13）。 所述启动电路包括：在所述第一端子和所述第三端子之间的第一电流路径; 所述第一终端和所述第二终端之间的第二电流路径; 所述第二端子和所述第三端子之间的第三电流通路; 沿着所述第二电流路径放置的双向电压调节器（M3，Dz2，R5，R6）。

公开(公告)号：WO2003007479A1

公开(公告)日：2003-01-23

申请号：PCT/EP2002/006487

申请日：2002-06-13

Applicant: STMICROELECTRONICS S.R.L. ,  CONFALONIERI, Pierangelo ,  ZAMPROGNO, Marco ,  NAGARI, Angelo

Inventor： CONFALONIERI, Pierangelo ,  ZAMPROGNO, Marco ,  NAGARI, Angelo

IPC: H03M1/06

CPC classification number: H03M1/0682 ,  H03M1/468 ,  H03M1/804

Abstract: The capacitors of a first array (10A') of sampling capacitors weighted in binary code are, connected between a first common circuit node (NB+) and an input terminal to be charged to the voltage (Vin) with respect to ground (Gnd) of a signal to be converted, and in accordance with BAR technique are then selectively connected with two differential reference terminals (Vrefp, Vrefm) .At the same time the capacitors of a second array (10B') equal to the first and all connected to a second node (NB-) are selectively connected to ground (Gnd) and the lower differential voltage terminal (Vrefm). The two nodes are connected to the respective inputs of a comparator (23"). A logic unit (17") controls the connections of the capacitors of the two arrays in accordance with a predetermined timing program and as a function of the output of the comparator (23"). Though the converter has a single-ended input, it behaves like a converter 20 with a differential input and therefore has an excellent immunity with respect to noise. Furthermore, it does not need either additional capacitors or a particularly sensitive comparator, so that it is characterized by low consumption and high speed and occupies a very small area of the integrated circuit of which it forms part.

Abstract translation: 以二进制码加权的采样电容器的第一阵列（10A'）的电容器连接在第一公共电路节点（NB +）和要被充电到相对于地的电压（Vin）的输入端子（Gnd）之间 然后根据BAR技术选择性地连接两个差分参考端（Vrefp，Vrefm），同时将第一阵列（10B'）的电容等于第一阵列（10B'），并将其全部连接到 第二节点（NB-）选择性地连接到地（Gnd）和下差分电压端（Vrefm）。 两个节点连接到比较器（23“）的相应输入端，逻辑单元（17”）根据预定的定时程序控制两个阵列的电容器的连接，并根据 比较器（23“）虽然转换器具有单端输入，但它的作用就像具有差分输入的转换器20，因此在噪声方面具有优异的抗扰度，而且不需要额外的电容器或特别敏感的 比较器，其特征在于低功耗和高速度，占据其形成部分的集成电路的非常小的面积。

公开(公告)号：WO2022063721A1

公开(公告)日：2022-03-31

申请号：PCT/EP2021/075780

申请日：2021-09-20

Applicant: STMICROELECTRONICS S.R.L. ,  PROTON WORLD INTERNATIONAL N.V.

Inventor： VAN NIEUWENHUYZE, Olivier ,  VENEROSO, Amedeo

IPC: G06F9/50 ,  G06F9/46 ,  G06F9/48 ,  G06F12/02 ,  G06F9/4401 ,  G06F21/78

Abstract: Embedded secure element The present description concerns an embedded electronic system or a method implemented by such a system, including: at least one volatile memory (RAM); and at least one low-level operating system managing the allocation of areas of the volatile memory to a plurality of high-level operating system, each including one or a plurality of applications, wherein said volatile memory includes: at least a first portion (PRAM30) reserved to execution data of a first application (App30); and at least a second portion intended to store execution data of at least a second application (App31), the execution data of the first application remaining in the volatile memory in case of a deactivation or of a setting to standby of this first application.

公开(公告)号：WO2020193663A1

公开(公告)日：2020-10-01

申请号：PCT/EP2020/058432

申请日：2020-03-25

Applicant: STMICROELECTRONICS S.R.L. ,  PROTON WORLD INTERNATIONAL N.V.

Inventor： VAN NIEUWENHUYZE, Olivier ,  VENEROSO, Amedeo

IPC: G06F9/445 ,  G06F12/02 ,  G06F12/0842 ,  G06F12/126 ,  G06F21/57 ,  G06F21/60 ,  G06F21/77

Abstract: La présente description concerne un élément sécurisé embarqué (E) comprenant une mémoire virtuelle (VRAM), et étant configuré pour mettre en oeuvre au moins une partie d'une première application (App20) adaptée à être miseen oeuvre par au moins un systèmed'exploitation de bas niveau (113) de l'élément sécurisé embarqué (E), dans lequel des données d'exécution relatives à une ou plusieurs tâches secondaires de ladite première application (App20) sont stockées dans une partie de ladite mémoire virtuelle (VRAM) lorsque que l'exécution de ladite partie de la première application (App20) est interrompue par l'exécution d'au moins une partie d'une deuxième application (App21).

公开(公告)号：WO2019025887A1

公开(公告)日：2019-02-07

申请号：PCT/IB2018/055139

申请日：2018-07-12

Applicant: STMICROELECTRONICS S.R.L.

Inventor： GALLUZZI, Alessandro Vittorio ,  PARISI, Riccardo

IPC: H04N7/18 ,  B60R1/00

Abstract: A vehicle such as a motor car (V) equipped with a radio equipment (14) is provided with a rearview camera 5 (10). Video frames from the rearview camera (10) are received at the radio equipment (14) and transmitted to a mobile communication device (S) such as a smart phone equipped with a video screen (S1) so that video frames from the rearview camera (10) are displayed on the 10 video screen (S1) of the mobile communication device (S).

公开(公告)号：WO2016012920A1

公开(公告)日：2016-01-28

申请号：PCT/IB2015/055434

申请日：2015-07-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： D'ANGELO, Francesco ,  CORONA, Stefano

IPC: G01S15/93 ,  G01S15/02 ,  G01S15/10 ,  G01S7/523 ,  G01S7/521

CPC classification number: G01S15/12 ,  G01S7/521 ,  G01S7/523 ,  G01S7/529 ,  G01S15/025 ,  G01S15/10 ,  G01S15/93 ,  G10K11/004

Abstract: A device for detecting obstacles (10) that is wearable by a subject (18) on a foot (19), in particular integrated in an item of footwear (30) that is wearable by the subject (18), the aforesaid device (10) comprising at least one ultrasound source (12T) for emitting an ultrasound transmission signal (UT) and an ultrasound receiver (12T) for receiving a corresponding ultrasound signal (UR) reflected by an obstacle (16), a control module (11) for measuring a time of flight (At) between emission of the ultrasound transmission signal (UT) and reception of the corresponding ultrasound signal (UR) reflected by the obstacle (16) and calculating, on the basis of the aforesaid time of flight (Δt), the distance (d) at which the obstacle (16) is located. The device comprises an inertial sensor (13), in particular an acceleration sensor, designed to measure acceleration of the foot (19) along three axes (x, y, z), and a control module (11) configured for enabling operation of the ultrasound source (12T) if the aforesaid acceleration values measured by the inertial sensor (13) respect a given condition (Cen) for enabling measurement of the time of flight (Δt).

Abstract translation: 一种用于检测由脚部（19）上的被摄体（18）穿戴的障碍物（10）的装置，特别是集成在由被摄体（18）穿戴的鞋类物品（30）中的前述装置（10） ）包括用于发射超声波传输信号（UT）的至少一个超声波源（12T）和用于接收由障碍物（16）反射的对应的超声信号（UR）的超声波接收器（12T），用于 测量在超声波发射信号（UT）的发射和由障碍物（16）反射的对应的超声波信号（UR）的接收之间的飞行时间（At），并且基于上述飞行时间（Δt） ，障碍物（16）所在的距离（d）。 该装置包括惯性传感器（13），特别是加速度传感器，其被设计成测量沿三个轴线（x，y，z）的脚部（19）的加速度;以及控制模块（11） 如果由惯性传感器（13）测量的上述加速度值相对于能够测量飞行时间（Δt）的给定条件（Cen），则超声波源（12T）。

公开(公告)号：WO2015150949A1

公开(公告)日：2015-10-08

申请号：PCT/IB2015/051947

申请日：2015-03-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： FILPI, Giuliano ,  SISMUNDO, Antonio ,  CAIAZZO, Raffaele

IPC: G06K19/077

CPC classification number: G06K19/07739 ,  G06K19/0772 ,  H01L21/56

Abstract: An integrated-circuit card (1) is described, said card comprising a substrate (2) and a circuit (3) integrated in the substrate (2), with the pads of the circuit (3) substantially coplanar with a surface (S) of the substrate (2). The substrate (2) comprises a first area defining a first sector (5) comprising the circuit (3) and able to be separated from the card (1), said first sector (5) having a form and size equivalent to a 4FF format of integrated-circuit cards and being intended to be separated from the card owing to a first pre-cut or weakening line (4) delimiting said first sector (5) with 4FF format; the card further comprises at least one area defining a second sector (7) around the first sector (5) and able to be separated from card (1) owing to a second pre-cut or weakening line (6), said second sector (7) having a form or size equivalent to a 2FF or 3FF format of integrated-circuit cards, and a screen-printed coating (8) on the surface (SC) opposite to the surface (S) of the substrate (2), in the region of at least the second sector (7), the screen-printed coating (8) having, along the second sector (7), a thickness (B) which is equal to the difference between a predefined thickness (X) of the 2FF or 3FF format and a thickness (A) of the first sector ( 5 ).

Abstract translation: 描述了集成电路卡（1），所述卡包括基板（2）和集成在基板（2）中的电路（3），电路（3）的焊盘与表面（S）基本共面， 的基板（2）。 衬底（2）包括限定包括电路（3）并且能够与卡（1）分离的第一扇区（5）的第一区域，所述第一扇区（5）具有与4FF格式相当的形式和大小 并且由于以4FF格式限定所述第一扇区（5）的第一预切割或弱化线（4），所述集成电路卡旨在与所述卡分离; 所述卡还包括限定第一扇区（5）周围的第二扇区（7）的至少一个区域，并且能够由于第二预切割或削弱线（6）而与卡（1）分离，所述第二扇区 7）具有与集成电路卡的2FF或3FF格式相当的形式或尺寸，以及在与基板（2）的表面（S）相对的表面（SC）上的丝网印刷涂层（8）， 至少第二扇区（7）的区域，丝网印刷涂层（8）具有沿着第二扇区（7）的厚度（B），该厚度等于预定厚度（X） 2FF或3FF格式和第一扇区（5）的厚度（A）。