公开(公告)号：EP1198879A1

公开(公告)日：2002-04-24

申请号：EP00946138.5

申请日：2000-07-18

Applicant: Cambridge Silicon Radio Limited

Inventor： COLLIER, James, Digby, Yarlet ,  SABBERTON, Ian, Michael

IPC: H03B5/12

CPC classification number: H03L7/099 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B2201/0266 ,  H03J2200/10

Abstract: A variable frequency oscillator comprising: an oscillatory circuit for generating a periodic output dependant on the capacitance between a first node and a second node of the circuit, and having a capacitative element connected between the first node and the second node; the capacitative element comprising: a variable capacitance unit, the capacitance of which is variable for varying the frequency of the output; and a plurality of trimming capacitances each being selectively connectable in parallel with the variable capacitance unit between the first node and the second node to trim the frequency of the output.

公开(公告)号：EP1198878A1

公开(公告)日：2002-04-24

申请号：EP00946137.7

申请日：2000-07-18

Applicant: Cambridge Silicon Radio Limited

Inventor： COLLIER, James Digby Yarlet ,  SABBERTON, Ian Michael

IPC: H03B5/12

CPC classification number: H03J3/08 ,  H03B5/1265 ,  H03B2201/0266 ,  H03J2200/10

Abstract: A radio transmitter and/or receiver comprising: an oscillator tuning circuit comprising an adjustable capacitor whose capacitance is adjustable my means of a first tuning signal; a filter tuning circuit comprising an adjustable capacitor whose capacitance is adjustable by means of a second tuning signal; an oscillator whose operational frequency is dependant on the reactance of the oscillator tuning circuit; a filter for filtering signals in the course of transmission and/or reception, and whose response is dependant on the reactance of the filter tuning circuit; and a tuning unit for generating the first and second tuning signals; wherein at least a part of the filter tuning circuit is a replica of at least a part of the oscillator tuning circuit and the tuning circuit is capable of generating one of the first and second tuning signals in dependence on the other of the tuning signals.

公开(公告)号：EP0985266B1

公开(公告)日：2001-12-19

申请号：EP99912935.6

申请日：1999-03-24

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BRUWER, Frederick ,  SMIT, Willem

IPC: H03B5/20

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: A transmitter system comprises an oscillator and having an adjustable monolithic capacitor circuit used for frequency stabilization. The oscillator signal is modulated and transmitted. A data generating chip is coupled to the transmitter. The data generating chip is used for adjusting and controlling the transmitter oscillator frequency signal. The adjustable capacitor circuit is located internal to the data generating chip and is coupled to a ground pin and one of a plurality of function pins on the data generating chip. The adjustable capacitor circuit is used for adjusting and setting the centerpoint of the transmitter oscillator frequency signal.

公开(公告)号：EP0985266A1

公开(公告)日：2000-03-15

申请号：EP99912935.6

申请日：1999-03-24

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BRUWER, Frederick ,  SMIT, Willem

IPC: H03B5/20

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: A transmitter system comprises an oscillator and having an adjustable monolithic capacitor circuit used for frequency stabilization. The oscillator signal is modulated and transmitted. A data generating chip is coupled to the transmitter. The data generating chip is used for adjusting and controlling the transmitter oscillator frequency signal. The adjustable capacitor circuit is located internal to the data generating chip and is coupled to a ground pin and one of a plurality of function pins on the data generating chip. The adjustable capacitor circuit is used for adjusting and setting the centerpoint of the transmitter oscillator frequency signal.

公开(公告)号：EP0695480B1

公开(公告)日：1997-08-13

申请号：EP94923867.9

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORPORATION

Inventor： SAUER, Donald, Jon ,  RODDA, William ,  CAMPBELL, Edward, Richard, III

IPC: H03L7/113

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

公开(公告)号：EP0695480A1

公开(公告)日：1996-02-07

申请号：EP94923867.0

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORPORATION

Inventor： SAUER, Donald, Jon ,  RODDA, William ,  CAMPBELL, Edward, Richard, III

IPC: H03L7 ,  H03B5 ,  H03K3 ,  H04N5 ,  H04N7 ,  H03B1

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

公开(公告)号：KR101376457B1

公开(公告)日：2014-03-27

申请号：KR1020137006637

申请日：2011-08-31

Applicant: 자일링크스 인코포레이티드

Inventor： 우파댜야야파라그 ,  키리브바실리

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1212 ,  H03B5/124 ,  H03B5/1262 ,  H03B5/1265 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: 조정 가능한 공진 회로(102)는 제1 커패시터의 제1 전극과 제2 전극 및 제2 커패시터의 제1 전극과 제2 전극 사이에 정합 커패시턴스를 제공하는 제1 커패시터들(104, 108, 216, 228, 232) 및 제2 커패시터들(106, 110, 218, 230, 234)를 포함한다. 딥 웰 장치는 기판(324)의 제2 웰(322, 328) 내에 배치된 제1 웰(320, 326)을 포함한다. 제1 커패시터 및 제2 커패시터 각각은 제1 웰 상에 배치될 수 있다. 제1 트랜지스터의 2개의 채널 전극(120, 130)은 제1 커패시터의 제2 전극(114, 304) 및 제2 커패시터의 제2 전극(118, 308)에 각각 결합된다. 제2 트랜지스터의 2개의 채널 전극(122, 132)은 제1 커패시터의 제2 전극 및 그라운드에 각각 결합된다. 제3 트랜지스터의 2개의 채널 전극(124, 134)은 제2 커패시터의 제2 전극 및 그라운드에 각각 결합된다. 제1 트랜지스터, 제2 트랜지스터, 및 제3 트랜지스터의 게이트 전극들(226, 314)은 조정 신호(126, 136)에 응답할 수 있고, 인덕터(144, 202)는 제1 커패시터 및 제2 커패시터의 제1 전극들(112, 116, 302, 306) 사이에 결합될 수 있다.

公开(公告)号：KR100990013B1

公开(公告)日：2010-10-26

申请号：KR1020087022016

申请日：2007-01-23

Applicant: 가부시키가이샤 무라타 세이사쿠쇼

Inventor： 아라마타토모히데

IPC: H03B5/02

CPC classification number: H03B5/1231 ,  H03B5/1203 ,  H03B5/1262 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: 제1, 제2 공진회로(2, 3)에는 제1, 제2 증폭회로(4, 5)를 각각 접속한다. 또한 선택회로(6)를 제1, 제2 스위치회로(7, 8) 등으로 구성하고, 제1, 제2 스위치회로(7, 8)를 이용해서 제1, 제2 증폭회로(4, 5)를 선택적으로 동작시킨다. 또한, 제1, 제2 증폭회로(4, 5)의 출력측에는 이들에서 공통으로 사용하는 접지용 콘덴서(C4)를 접속한다. 한편, 제1 스위치회로(7)에는, 제1 증폭회로(4)와의 사이에 위치하여 보조의 접지용 콘덴서(C14)를 접속한다. 이로 인해, 제1 증폭회로(4)가 동작할 때에만, 접지용 콘덴서(C4)에 보조의 접지용 콘덴서(C14)를 병렬 접속할 수 있다.
고주파 발진기, 공진회로, 증폭회로, 선택회로, 스위치회로, 접지용 콘덴서

公开(公告)号：KR1020060117267A

公开(公告)日：2006-11-16

申请号：KR1020060042936

申请日：2006-05-12

Applicant: 알프스 덴키 가부시키가이샤

Inventor： 고바야시히로키

IPC: H03B5/24 ,  H03B5/18

CPC classification number: H03B5/1231 ,  H03B5/1218 ,  H03B5/1243 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: A dual band oscillator is provided to prevent an oscillation signal outputted from one side oscillation transistor from being attenuated by an inductor connected to a collector of the other side oscillation transistor. In a dual band oscillator, a first oscillation transistor(11) outputs an oscillation signal of a first frequency bandwidth from a collector. A first inductor(12) supplies power to the collector of the first oscillation transistor(11). A first switching device(16) converts an operation/non-operation of the first oscillation transistor(11). The second oscillation transistor(21) outputs an oscillation signal of a second frequency bandwidth from a collector. A second inductor(22) supplies power to the collector of the second oscillation transistor(21). A second switching device(26) switches an operation/non-operation of the second oscillation transistor(21). An output terminal(30) outputs the oscillation signal of the first frequency bandwidth or the oscillation signal of the second frequency bandwidth to outside. And, the dual band oscillator is inserted between the first inductor(12) and the output terminal(30) through the first switching device(16) and inserted between the second inductor(22) and the output terminal(30) through the second switching device(26).

Abstract translation: 提供双频带振荡器以防止从一侧振荡晶体管输出的振荡信号被连接到另一侧振荡晶体管的集电极的电感器衰减。 在双频带振荡器中，第一振荡晶体管（11）从集电极输出第一频带的振荡信号。 第一电感器（12）向第一振​​荡晶体管（11）的集电极供电。 第一开关器件（16）转换第一振荡晶体管（11）的操作/非操作。 第二振荡晶体管（21）从集电极输出第二频带的振荡信号。 第二电感器（22）向第二振荡晶体管（21）的集电极供电。 第二开关器件（26）切换第二振荡晶体管（21）的操作/非操作。 输出端子（30）将第一频带的振荡信号或第二频带的振荡信号输出到外部。 并且，通过第一开关器件（16）将双频带振荡器插入到第一电感器（12）和输出端子（30）之间，并通过第二开关插入到第二电感器（22）和输出端子（30）之间 装置（26）。

公开(公告)号：KR1020010012876A

公开(公告)日：2001-02-26

申请号：KR1019997010842

申请日：1999-03-24

Applicant: 마이크로칩 테크놀로지 인코포레이티드

Inventor： 브루워,프레더릭 ,  스미트,윌리엄

IPC: H03B5/20 ,  H04B1/26

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: 주파수안정화및 동조내부캐패시터회로상에조절가능한모노리딕(monolithic)을갖는송신기시스템. 송신기시스템은송신기발진기주파수신호를발생및 송신하는송신기를갖는다. 데이터발생칩은송신기에결합된다. 데이터발생칩은송신기발진기주파수신호를조절및 제어하는데 사용된다. 가변캐패시터회로는데이터발생칩의내부에위치되고접지핀, 및데이터발생칩상의복수의기능핀들중하나에결합된다. 가변캐패시터회로는송신기발진기주파수신호의중심점을조절및 세팅하는데 사용된다.

Abstract translation: 变送器系统具有可调节的单片稳频和调谐内部电容电路。 发射机系统有一个发射机，用于产生和发射发射机振荡器频率信号。 数据产生芯片耦合到发射器。 数据生成芯片用于调节和控制发送器振荡器的频率信号。 可变电容器电路位于数据产生芯片内并且耦合到数据产生芯片上的接地引脚和多个功能引脚中的一个。 可变电容电路用于调整和设置发射机振荡器频率信号的中心点。