Abstract:
A radio-frequency receiver includes an RF amplification circuit which amplifies a received RF signal and generates an amplified RF signal, a mixing circuit which converts the amplified RF signal into an intermediate-frequency signal, an IF amplification circuit which generates an amplified IF signal, a first level detection circuit which detects a level of the amplified RF signal, a second level detection circuit which detects a level of the IF signal, a third level detection circuit which detects a level of the amplified IF signal, a RF reference level generation circuit which generates an RF reference level based on one of respective detection signal levels of the first and second level detection circuits, and an RF gain control circuits which controls an amplification gain of the RF amplification circuit so that a detection signal level of the third level detection circuit becomes equal to the RF reference level.
Abstract:
A Variable Gain Amplifier (VGA) amplifies an input signal according to a gain, to produce an amplified signal. A detector module detects a power indicative of a power of the amplified signal. A comparator module compares the detected power to a high threshold, a low threshold and a target threshold intermediate the high and low thresholds. A controller module changes the gain of the VGA so as to drive the detected power in a direction toward the middle threshold when the comparator module indicates the detected power is not between the high and low thresholds.
Abstract:
In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient λ due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.
Abstract:
A radio-frequency receiver includes an RF amplification circuit which amplifies a received RF signal and generates an amplified RF signal, a mixing circuit which converts the amplified RF signal into an intermediate-frequency signal, an IF amplification circuit which generates an amplified IF signal, a first level detection circuit which detects a level of the amplified RF signal, a second level detection circuit which detects a level of the IF signal, a third level detection circuit which detects a level of the amplified IF signal, a RF reference level generation circuit which generates an RF reference level based on one of respective detection signal levels of the first and second level detection circuits, and an RF gain control circuits which controls an amplification gain of the RF amplification circuit so that a detection signal level of the third level detection circuit becomes equal to the RF reference level.
Abstract:
A transmitter includes a dual mode modulator and an amplifier coupled to the dual mode modulator. The dual mode modulator implements a linear modulation scheme during a first mode of the modulator to produce a variable envelope modulated signal. The dual mode modulator implements a non-linear modulation scheme during a second mode of the modulator to produce a constant envelope modulated signal. The amplifier is biased as a linear amplifier during the first mode of the modulator and is biased as a non-linear amplifier during the second mode of the modulator. A feed-forward connection between the dual mode modulator and the amplifier is used to indicate a change in modulation mode and to adjust the bias of the amplifier. A power of the constant envelope modulated signal is increased such that an operating point of the amplifier remains substantially constant during the first and second modes of the modulator.
Abstract:
A transmitter includes a dual mode modulator and an amplifier coupled to the dual mode modulator. The dual mode modulator implements a linear modulation scheme during a first mode of the modulator to produce a variable envelope modulated signal. The dual mode modulator implements a non-linear modulation scheme during a second mode of the modulator to produce a constant envelope modulated signal. The amplifier is biased as a linear amplifier during the first mode of the modulator and is biased as a non-linear amplifier during the second mode of the modulator. A feed-forward connection between the dual mode modulator and the amplifier is used to indicate a change in modulation mode and to adjust the bias of the amplifier. A power of the constant envelope modulated signal is increased such that an operating point of the amplifier remains substantially constant during the first and second modes of the modulator.
Abstract:
An automatic gain control device includes an amplifier for a reception signal, a signal processing unit, a memory, and a control unit. The amplifier can set a gain. The signal processing unit extracts control data from an output from the amplifier and performs information processing for the data. The memory stores the gain setting value of the amplifier. The control unit controls the gain of the amplifier in accordance with a preset control algorithm. On the basis of the result obtained when the control unit computes a gain setting value stored in the memory in accordance with a preset algorithm, the control unit controls the gain of the amplifier in correspondence with operation of switching the frequency of a reception signal, which is accompanied by different frequency monitoring in the compressed mode by the signal processing unit. A radio communication terminal, a control method for an automatic gain control device, a control program for an automatic gain control device, an automatic gain control method, a radio communication system, and a radio communication method are also disclosed.
Abstract:
Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.
Abstract:
An object of the invention is to provide a transmitter high in efficiency, good in linearity and capable of covering an output level in a wide range. Either linear operating mode or saturation operating mode is set as the operating mode of a high-frequency power amplifier (15) on the basis of an operating mode set signal (107). The gain of a variable gain amplifier (14) provided in front of the high-frequency power amplifier (15) and values of output voltage (109) and bias current supplied from a supply voltage/bias current control circuit (17) to the high-frequency power amplifier (15) are switched. The gain of the variable gain amplifier (14) in the saturation operating mode is formed so as to be higher by a predetermined value than that in the linear operating mode. Accordingly, the high-frequency power amplifier 15 operates in the designated operating mode, so that the output transmission power range can be widened.
Abstract:
In a slot format of a received signal, AGC gain update timings (t1 to t4) are shifted every time to disperse and reduce an influence of a noise attributable to a direct current component specific to direct conversion which is accompanied by AGC gain update. In particular, in the case where each of slots in the received signal includes an information portion (data) having a larger code correcting capability and an information portion having a smaller code correcting capability (TPC (transmission power control), TFCI (transport format combination indicator), PILOT), the AGC gain update timing is generated while being shifted in the former information portion, thereby reduce the influence of the noise. When the amount of shift of the AGC gain update timing is set to be larger than that of one symbol of the received signal, the influence of the noise accompanied by the AGC gain update is further reduced.