-
公开(公告)号：US10735913B2
公开(公告)日：2020-08-04
申请号：US16127691
申请日：2018-09-11
Applicant: Silicon Laboratories Inc.
Inventor： Jørgen Franck , Jakob Buron , Anders Lynge Esbensen , Mohammad Sadegh Mohammadi , Anders T. Brandt
Abstract: A system and method for transmitting packets to a plurality of network devices that cannot be accessed via a single hop. The system includes a source, which issues a multicast message to those network devices in close proximity, and also transmits an encapsulated multicast message to a distribution node. This encapsulated multicast message may be routed using traditional routing protocols. The distribution node then transmits the multicast message to those network devices within close proximity. The distribution node may also have the ability to transmit singlecast messages to those network devices, if necessary, to perform retries.
-
公开(公告)号：US10734894B1
公开(公告)日：2020-08-04
申请号：US16547107
申请日：2019-08-21
Applicant: Silicon Laboratories Inc.
Inventor： Chao Yang , Mohamed Elsayed
Abstract: A charge pump system including charge pump circuitry, a charge pump controller, and current limit circuitry. The charge pump circuitry has an input coupled to a supply input node and has an output for developing a drive voltage. The charge pump controller controls the charge pump circuitry to increase the drive voltage above a supply voltage provided to the supply input node. The current limit circuitry limits current through the charge pump circuitry to a limited current level that is less than a maximum current level during a current limit mode to reduce current spikes at the nodes of the charge pump system that may generate EMI. A current mirror may be used as the current limit circuitry to directly limit current through switches of the charge pump circuitry. The timing of the charge pump switches may also be modified such as inserting strategic delays to reduce the current spikes.
-
公开(公告)号：US10727844B1
公开(公告)日：2020-07-28
申请号：US16427826
申请日：2019-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Xue-Mei Gong , James D. Barnette , Krishnan Balakrishnan
Abstract: A method for operating a phase-locked loop includes generating a phase difference signal based on an input clock signal and a feedback clock signal. The method includes filtering a loop filter input signal based on the phase difference signal to generate a loop filter output signal. The feedback clock signal is based on the loop filter output signal. The method includes transitioning a frequency of an output clock signal of the phase-locked loop from a first frequency to a target frequency responsive to detection of a catastrophic cycle slip event in the absence of an out-of-frequency event.
-
公开(公告)号：US10720948B2
公开(公告)日：2020-07-21
申请号：US16410055
申请日：2019-05-13
Applicant: Silicon Laboratories Inc.
Inventor： Hendricus de Ruijter , Ping Xiong
Abstract: A method for operating a communications system includes transmitting a preamble sequence including a plurality of tones. Each tone of the plurality of tones has a first characteristic and a second characteristic. The first characteristic of each of the tones of the plurality of tones has a predetermined relative relationship to the first characteristic of each of the other tones of the plurality of tones and the second characteristic of each of the tones of the plurality of tones has a predetermined relative relationship to the second characteristic of each of the other tones of the plurality of tones. The first and second characteristics may include relative power and relative phase.
-
公开(公告)号：US10712390B2
公开(公告)日：2020-07-14
申请号：US15713178
申请日：2017-09-22
Applicant: Silicon Laboratories Inc.
Inventor： Vivek Sarda
IPC: G01R31/3185 , G01R31/319 , G05F1/10
Abstract: During scan testing a voltage regulator is programmed to supply a first voltage to logic under test during a shift portion of the scan test, a second voltage during a first portion of a capture portion of the scan test and at least a third voltage during a second portion of the capture portion of the scan test. The availability of a programmable voltage regulator during shift and capture portions of scan testing allows a less stressful voltage to be used during a shift portion of the scan test to reduce shift failures and allows various voltages to be used during capture portions of the scan testing as a surrogate for testing at different temperatures and to provide more flexibility in testing margins.
-
Patent Agency Ranking
公开(公告)号：US10700901B1
公开(公告)日：2020-06-30
申请号：US16587248
申请日：2019-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Antonio Torrini , Joel Kauppo , Sauli Johannes Lehtimaki
Abstract: A system and method for detecting and compensating for carrier frequency offset is disclosed. This system compensates for CFO and calculates a corrected phase. This corrected phase may be used by, for example, an AoX algorithm, such as MUSIC, to more accurately determine the angle of arrival or angle of departure of a signal. In certain embodiments, the system oversamples the incoming signal to create a plurality of samples. The system then determines the phase of each of the plurality of samples and calculates the carrier frequency based on the time derivative of the phase. In certain embodiments, a particular portion of an incoming packet is used to determine the carrier frequency offset. In other embodiments, the system calculates the carrier frequency offset throughout an entirety of the incoming packet. Once the carrier frequency offset is determined, it can be used to adjust the received signals. These adjusted signals are then used to determine the angle of arrival or angle of departure.
-
公开(公告)号：US10699995B2
公开(公告)日：2020-06-30
申请号：US15974857
申请日：2018-05-09
Applicant: Silicon Laboratories Inc.
Inventor： Michael R. May , Charles Guo Lin , Carlos Briseno-Vidrios
IPC: H01L23/498 , H01L23/00 , H01L23/64
Abstract: An integrated circuit isolation product includes a first integrated circuit die. The first integrated circuit die includes a first terminal and a second terminal adjacent to the first terminal. The first terminal and the second terminal are configured as a differential pair of terminals configured to communicate a differential signal across an isolation barrier. The first integrated circuit die includes at least one additional terminal adjacent to the differential pair of terminals. The at least one additional terminal is disposed symmetrically with respect to the differential pair of terminals. The first terminal may have a first parasitic capacitance and the second terminal may have a second parasitic capacitance. The first parasitic capacitance may be substantially the same as the second parasitic capacitance. The at least one additional terminal may be disposed symmetrically with respect to a line of symmetry for the differential pair of terminals.
-
公开(公告)号：US10693475B1
公开(公告)日：2020-06-23
申请号：US16427837
申请日：2019-05-31
Applicant: Silicon Laboratories Inc.
Inventor： Xue-Mei Gong , James D. Barnette
IPC: H03L7/093
Abstract: A method for generating a clock signal by a phase-locked loop includes generating a phase difference signal based on an input clock signal and a feedback clock signal and generating a loop filter output signal. In a first mode, the loop filter output signal is generated based on the phase difference signal and a predetermined frequency slope, and may include generating a phase-slope-limited version of the phase difference signal based on a predetermined phase slope limit and generating a frequency-slope-limited version of the phase difference signal based on the predetermined frequency slope limit. In a second mode, the loop filter output signal may be generated based on the predetermined frequency slope limit, a value of the loop filter output signal, and a target frequency. In the second mode, the loop filter output signal may be generated further based on a predetermined frequency step value.
-
公开(公告)号：US10678674B2
公开(公告)日：2020-06-09
申请号：US15623761
申请日：2017-06-15
Applicant: Silicon Laboratories Inc.
Inventor： Lauri Mikael Hintsala
Abstract: A novel system and method for remotely debugging a network device is disclosed. A debug system is used to transmit debug commands over a network to the network device. The network device interprets the debug commands. The processing unit on the network device includes a special debugging mode where it is able to perform special debug operations. This special debugging mode operates at a priority that is lower than that of the network interface so that the network device can still receive network packets while being debugged. The network device also has the ability to generate responses to the debug commands in some embodiments. The concept of wireless debugging can also be applied to multi-core processors as well.
-
公开(公告)号：US10673688B2
公开(公告)日：2020-06-02
申请号：US16137815
申请日：2018-09-21
Applicant: Silicon Laboratories Inc.
Inventor： Christian Salmony Olsen , Jørgen Franck , Peter Shorty , Anders T. Brandt
Abstract: A system and method for improving network resiliency is disclosed. The system includes a network having a plurality of network devices and at least one controller. The controller is configured to create various scenes based on the inputs received from the network devices. The controller is also configured to provide alternate instructions to the network devices in the event that the controller is non-functional. The network devices utilize these alternate instructions when attempts to connect the controller are unsuccessful. In this way, the network is able to operate in a limited way even in the absence of the controller.
-
-
-
-
-
-
-
-
-
Search Results
1707
records
(took 0.034 seconds)
