公开(公告)号：US06686679B1

公开(公告)日：2004-02-03

申请号：US09762066

申请日：2001-01-30

Applicant: Richard Allan Tuck ,  Hugh Edward Bishop

Inventor： Richard Allan Tuck ,  Hugh Edward Bishop

IPC: H01J130

CPC classification number: H01J1/304 ,  H01J2201/30403

Abstract: A field electron emission material has a substrate with an electrically conductive surface. Electron emission sites on the conductive surface each include a layer of electrically insulating material to define a primary interface region between the conductive surface and the insulating layer, and a secondary interface region between the insulating layer and the vacuum environment,. Each primary interface region is treated or created so as to enhance the probability of electron injection form the conductive surface into the insulating layer. Each primary interface region after such treatment or creation is either an insulator or graded from conducting adjacent the conductive surface to insulating adjacent the insulating layer.

Abstract translation: 场电子发射材料具有具有导电表面的衬底。 导电表面上的电子发射部位各自包括电绝缘材料层，以限定导电表面和绝缘层之间的主界面区域，以及绝缘层和真空环境之间的次级界面区域。 每个主界面区域被处理或产生，以增强电子注入形成导电​​表面进入绝缘层的概率。 在这种处理或制造之后的每个主界面区域是绝缘体，或者是从靠近导电表面的导电分级到与绝缘层相邻的绝缘层。

公开(公告)号：US06664727B2

公开(公告)日：2003-12-16

申请号：US09810649

申请日：2001-03-19

Applicant: Masayuki Nakamoto

Inventor： Masayuki Nakamoto

IPC: H01J162

CPC classification number: B82Y30/00 ,  B82Y10/00 ,  H01J1/304 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30469 ,  H01J2201/319 ,  Y10S977/734 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/939 ,  Y10T428/30 ,  Y10T428/31678

Abstract: A field emission type cold cathode device comprises a substrate, and a metal plating layer formed on the substrate, the metal plating layer contains at least one carbon structure selected from a group of fullerenes and carbon nanotubes, the carbon structure is stuck out from the metal plating layer and a part of the carbon structure is buried in the metal plating layer.

Abstract translation: 场发射型冷阴极器件包括衬底和形成在衬底上的金属镀层，金属镀层含有至少一种选自富勒烯和碳纳米管的碳结构，碳结构从金属 镀层和一部分碳结构埋在金属镀层中。

公开(公告)号：US06645402B1

公开(公告)日：2003-11-11

申请号：US09582801

申请日：2000-06-30

Applicant: Hideo Kurokawa ,  Tetsuya Shiratori ,  Masahiro Deguchi ,  Makoto Kitabatake

Inventor： Hideo Kurokawa ,  Tetsuya Shiratori ,  Masahiro Deguchi ,  Makoto Kitabatake

IPC: H01J130

CPC classification number: B82Y10/00 ,  H01J1/304 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30469 ,  H01J2201/319

Abstract: An electron emitting device includes at least a first electrode and an electron emitting section provided on the first electrode. The electron emitting section is formed of a particle or an aggregate of particles. The particle contains a carbon material having a carbon six-membered ring structure. The carbon material having a carbon six-membered ring structure contains, for example, graphite or a carbon nanotube as a main component.

Abstract translation: 电子发射器件至少包括设置在第一电极上的第一电极和电子发射部分。 电子发射部分由颗粒或颗粒聚集体形成。 颗粒含有具有碳六元环结构的碳材料。 具有碳六元环结构的碳材料包含例如石墨或碳纳米管作为主要成分。

公开(公告)号：US20030141495A1

公开(公告)日：2003-07-31

申请号：US10347622

申请日：2003-01-22

Applicant: Samsung SDI Co., Ltd.

Inventor： Hang-Woo Lee ,  Sang-Jin Lee ,  Shang-Hyeun Park

IPC: H01L029/06

CPC classification number: B82Y10/00 ,  H01J1/304 ,  H01J9/025 ,  H01J2201/30403 ,  Y10S977/952

Abstract: A field emission display device and a method of fabricating the same are provided. The field emission display device includes a substrate, a transparent cathode layer, an insulation layer, a gate electrode, a resistance layer, and carbon nanotubes. The transparent cathode layer is deposited on the substrate. The insulation layer is formed on the cathode layer and has a well exposing the cathode layer. The gate electrode is formed on the insulation layer and has an opening corresponding to the well. The resistance layer is formed to surround the surface of the gate electrode and the inner walls of the opening and the well so as to block ultraviolet rays. The carbon nanotube field emitting source is positioned on the exposed cathode layer. An alignment error between the gate electrode and the cathode is removed, and carbon nanotube paste is prevented from remaining during development, thereby preventing current leakage and short circuit between the electrodes and diode emission. Accordingly, the performance of the field emission display device can be improved.

Abstract translation: 提供场发射显示装置及其制造方法。 场发射显示装置包括基板，透明阴极层，绝缘层，栅电极，电阻层和碳纳米管。 透明阴极层沉积在衬底上。 绝缘层形成在阴极层上并具有使阴极层暴露的良好状态。 栅电极形成在绝缘层上并且具有对应于阱的开口。 电阻层形成为围绕栅电极的表面和开口和阱的内壁，以阻挡紫外线。 碳纳米管场发射源位于暴露的阴极层上。 除去栅电极和阴极之间的对准误差，并且防止在显影期间保留碳纳米管糊，从而防止电极之间的电流泄漏和短路以及二极管发射。 因此，可以提高场发射显示装置的性能。

公开(公告)号：US06559442B1

公开(公告)日：2003-05-06

申请号：US09551563

申请日：2000-04-18

Applicant: Didier Pierrejean

Inventor： Didier Pierrejean

IPC: B01D5944

CPC classification number: H01J3/022 ,  H01J1/20 ,  H01J1/3042 ,  H01J2201/196 ,  H01J2201/30403

Abstract: A system in accordance with the invention which generates electrons by means of a field-emission cathode comprises an array of electron-emitting micropoints associated with a grid and carried by a substrate with integral heater means for heating the micropoints to a temperature in the range approximately 300° C. to approximately 400° C. and maintaining them at that temperature during emission of electrons. The cathode can therefore function at higher residual air pressures with no risk of breakdown.

Abstract translation: 根据本发明的通过场发射阴极产生电子的系统包括与栅格相关联的电子发射微点阵列，并由具有用于将微点加热到大约范围内的温度的整体加热器装置的衬底承载 300℃至约400℃，并在电子发射期间将其保持在该温度。 因此，阴极可以在更高的残留空气压力下起作用，而不会有击穿的危险。

公开(公告)号：US06498424B1

公开(公告)日：2002-12-24

申请号：US09551877

申请日：2000-04-18

Applicant: Ichiro Saito ,  Kouji Inoue ,  Shinichi Tachizono ,  Takeshi Yamagishi

Inventor： Ichiro Saito ,  Kouji Inoue ,  Shinichi Tachizono ,  Takeshi Yamagishi

IPC: H01J102

CPC classification number: H01J1/304 ,  H01J9/025 ,  H01J2201/30403 ,  Y10S977/939

Abstract: To form a sharp edge portions of an electron emission part of a field emission type cathode to face an electron application surface. At least an electron emission part 40 of a field emission type cathode K is constituted by stacking thin plate-like conductive fine grains 30 and the field emission type cathode K is formed so that the plane direction of the thin plate-like fine grains of the electron emission part 40 crosses an electron application surface.

Abstract translation: 形成场发射型阴极的电子发射部分的锋利边缘部分以面对电子施加表面。 至少场致发射型阴极K的电子发射部分40由层叠薄板状导电细晶粒30构成，并且形成场发射型阴极K，使得薄板状细晶粒的平面方向 电子发射部分40穿过电子施加表面。

公开(公告)号：US06492966B1

公开(公告)日：2002-12-10

申请号：US08281912

申请日：1994-07-27

Applicant: Alton O. Christensen

Inventor： Alton O. Christensen

IPC: G09G330

CPC classification number: H01J1/3042 ,  H01J2201/30403 ,  H01J2201/319

Abstract: Triode pixel devices and complementary triode logic devices for control of the pixel devices are disclosed. The pixel and logic devices are integrally fabricated in arrays suitable for full color flat display panels. Both pixel and logic elements are operated in a gate controlled avalanche mode. Pixel elements are formed from organic or inorganic electroluminescent (EL) materials ohmically contacted by low work function metal. The depletion region necessary for controlling EL intensity or preventing EL avalanche is affected by potentials to a gate element injected into the EL material. The shape of the gate element multiplies the field produced by the gate potential. Luminescence is directly viewed from the brighter, lateral EL emission not available in the prior art. The complementary logic devices are formed from separate depositions of n-type and p-type silicon with their respective gates connected in common. A manufacturing process to produce economical full color, large area, flat-panel, displays of high pixel density and redundancy is described. Small area high pixel density displays suitable for head-mounted military, avionic, and virtual reality display products are also discussed.

Abstract translation: 公开了用于控制像素装置的三极体像素装置和互补三极管逻辑装置。 像素和逻辑器件被整体地制成阵列，适用于全彩平板显示面板。 像素和逻辑元件都以栅极控制的雪崩模式工作。 像素元件由低功函数金属欧姆接触的有机或无机电致发光（EL）材料形成。 用于控制EL强度或防止EL雪崩所需的耗尽区受到注入到EL材料中的栅极元件的电位的影响。 栅极元件的形状将由栅极电位产生的场相乘。 从现有技术中不可获得的较亮的侧向EL发射中直接观察发光。 互补逻辑器件由n型和p型硅的分开沉积形成，其相应的栅极共同连接。 描述了生产经济的全彩色，大面积，平板，高像素密度和冗余的显示器的制造工艺。 还讨论了适用于头戴式军用，航空电子和虚拟现实显示产品的小面积高像素密度显示器。

公开(公告)号：US06426234B2

公开(公告)日：2002-07-30

申请号：US09782396

申请日：2001-02-13

Applicant: Terry L. Gilton

Inventor： Terry L. Gilton

IPC: H01L2100

CPC classification number: H01J9/025 ,  H01J2201/30403 ,  H01J2209/0226

Abstract: A process is provided for forming sharp asperities useful as field emitters. The process comprises patterning and doping a silicon substrate. The doped silicon substrate is anodized. The anodized area is then use for field emission tips. The process of the present invention is also useful for low temperature sharpening of tips fabricated by other methods. The tips are anodized, and then exposed to radiant energy and the resulting oxide is removed.

Abstract translation: 提供了用于形成用作场致发射体的尖锐凹凸的工艺。 该工艺包括图案化和掺杂硅衬底。 掺杂硅衬底被阳极氧化。 然后阳极氧化区域用于场发射尖端。 本发明的方法也可用于通过其它方法制造的尖端的低温磨削。 尖端被阳极氧化，然后暴露于辐射能，并且所得到的氧化物被去除。

公开(公告)号：US20010018222A1

公开(公告)日：2001-08-30

申请号：US09782396

申请日：2001-02-13

Inventor： Terry L. Gilton

IPC: H01L021/00

CPC classification number: H01J9/025 ,  H01J2201/30403 ,  H01J2209/0226

Abstract: A process is provided for forming sharp asperities useful as field emitters. The process comprises patterning and doping a silicon substrate. The doped silicon substrate is anodized. The anodized area is then used for field emission tips. The process of the present invention is also useful for low temperature sharpening of tips fabricated by other methods. The tips are anodized, and then exposed to radiant energy and the resulting oxide is removed.

Abstract translation: 提供了用于形成用作场致发射体的尖锐凹凸的工艺。 该工艺包括图案化和掺杂硅衬底。 掺杂硅衬底被阳极氧化。 然后将阳极氧化区域用于场发射尖端。 本发明的方法也可用于通过其它方法制造的尖端的低温磨削。 尖端被阳极氧化，然后暴露于辐射能，并且所得到的氧化物被去除。

公开(公告)号：US06235545B1

公开(公告)日：2001-05-22

申请号：US09251262

申请日：1999-02-16

Applicant: Ammar Derraa

Inventor： Ammar Derraa

IPC: H01L2100

CPC classification number: H01J9/025 ,  H01J2201/30403

Abstract: In one aspect, the invention encompasses a method of treating the end portions of an array of substantially upright silicon-comprising structures. A substrate having a plurality of substantially upright silicon-comprising structures extending thereover is provided. The substantially upright silicon-comprising structures have base portions, and have end portions above the base portions. A masking layer is formed over the substrate to cover the base portions of the substantially upright silicon-comprising structures while leaving the end portions exposed. The end portions are then exposed to conditions which alter the end portions relative to the base portions. In another aspect, the invention encompasses a method of treating the ends of an array of silicon-comprising emitter structures. A substrate having a plurality of silicon-comprising emitter structures thereover is provided. The emitter structures have base portions and ends above the base portions. A layer of spin-on-glass is formed over the substrate. The layer of spin-on-glass covers the base portions of the emitter structures and leaves the ends exposed. The ends are then exposed to conditions which alter the ends relative to the base portions. In yet another aspect, the invention encompasses a cathode assembly which includes a plurality of silicon-comprising emitter structures projecting over a substrate. The emitter structures have base portions and ends above the base portions, and the ends comprise a different material than the base portions.

Abstract translation: 在一个方面，本发明包括一种处理基本上直立的含硅结构阵列的端部的方法。 提供了一种具有多个基本上直立的含硅结构延伸到其上的衬底。 基本上直立的含硅结构具有基部，并且在基部上方具有端部。 掩模层形成在衬底上以覆盖基本上直立的含硅结构的基部，同时使端部露出。 然后将端部暴露于相对于基部改变端部的条件。 在另一方面，本发明包括处理含硅发射体结构阵列的端部的方法。 提供了具有多个其上含硅的发射体结构的衬底。 发射极结构具有基部并且在基部上方结束。 在衬底上形成一层旋涂玻璃。 旋涂玻璃层覆盖发射器结构的基部并使端部露出。 然后将端部暴露于相对于基部改变端部的条件。 在另一方面，本发明包括阴极组件，其包括在衬底上突出的多个包含硅的发射器结构。 发射极结构具有基部和端部在基部之上，并且端部包括与基部不同的材料。