公开(公告)号：WO2012143325A1

公开(公告)日：2012-10-26

申请号：PCT/EP2012/056901

申请日：2012-04-16

Applicant: STMICROELECTRONICS (TOURS) SAS ,  STMICROELECTRONICS S.R.L. ,  CARO, Vincent ,  RODILOSSO, Davide

Inventor： CARO, Vincent ,  RODILOSSO, Davide

IPC: H01L21/311

CPC classification number: H01G7/06 ,  H01L21/31111 ,  H01L28/55

Abstract: The invention concerns a method for etching a PVD deposited barium strontium titanate (BST) layer, wherein a non-ionic surfactant at a concentration between 0.1 and 1 percent is added to an acid etching solution.

Abstract translation: 本发明涉及一种用于蚀刻PVD沉积的钛酸钡锶（BST）层的方法，其中将0.1％至1％浓度的非离子表面活性剂加入酸蚀刻溶液中。

公开(公告)号：WO2012085059A1

公开(公告)日：2012-06-28

申请号：PCT/EP2011/073554

申请日：2011-12-21

Applicant: STMICROELECTRONICS S.R.L. ,  FIORELLI, Riccardo ,  CATALIOTTI, Antonio ,  DI CARA, Dario ,  TINE', Giovanni

Inventor： FIORELLI, Riccardo ,  CATALIOTTI, Antonio ,  DI CARA, Dario ,  TINE', Giovanni

IPC: H04B3/56

CPC classification number: H03H7/004 ,  H04B3/56 ,  H04B2203/5491

Abstract: A coupling interface couples a transceiver to one or more capacitive voltage dividers of a power transmission system. The coupling interface includes a first signal path including an adjustable inductance configured to form a resonance circuit with a capacitance associated with the one or more capacitive voltage dividers. The coupling interface may include a second signal path including an adjustable inductance configured to form a resonance circuit with the capacitance associated with the one or more capacitive voltage dividers.

Abstract translation: 耦合接口将收发器耦合到电力传输系统的一个或多个电容性分压器。 耦合接口包括第一信号路径，其包括被配置为形成具有与一个或多个电容分压器相关联的电容的谐振电路的可调整电感。 耦合接口可以包括第二信号路径，其包括被配置成形成具有与一个或多个电容分压器相关联的电容的谐振电路的可调电感。

公开(公告)号：WO2012077145A8

公开(公告)日：2012-06-14

申请号：PCT/IT2010/000493

申请日：2010-12-09

Applicant: STMICROELECTRONICS S.R.L. ,  GHISU, Davide Ugo ,  RICCIARDO, Antonio ,  ROSSI, Sandro

Inventor： GHISU, Davide Ugo ,  RICCIARDO, Antonio ,  ROSSI, Sandro

IPC: B06B1/02 ,  H03K17/10 ,  H03K17/687 ,  H03K17/693

Abstract: A switching circuit (10) for an ultrasound transmission channel (1) is inserted between a connection terminal (Xdcr) and a low voltage output terminal (LVout) and comprising a receiving switch (30) a high voltage clamp circuit (HV1) inserted between the connection terminal (Xdcr) and a central node (Vc), a low voltage clamping switch (25) inserted between said central node (Vc) and a reference voltage (GND), the receiving switch (30) being low voltage and being inserted between the central node (Vc) and the low voltage output terminal (LVout), the clamping switch (25) and the receiving switch (30) being controlled in a complementary way with respect to each other. A transmission channel ( 1) for ultrasound applications is also described comprising at least such a switching circuit (10) and a process for driving said switching circuit (10).

公开(公告)号：WO2012070021A1

公开(公告)日：2012-05-31

申请号：PCT/IB2011/055309

申请日：2011-11-25

Applicant: STMICROELECTRONICS S.R.L. ,  POLITECNICO DI MILANO ,  COMI, Claudia ,  CORIGLIANO, Alberto ,  SIMONI, Barbara

Inventor： COMI, Claudia ,  CORIGLIANO, Alberto ,  SIMONI, Barbara

IPC: G01P15/097 ,  G01P15/18

CPC classification number: G01P15/097 ,  G01P15/0888 ,  G01P15/18 ,  G01P2015/082

Abstract: A microelectromechanical detection structure (1; 1') for a MEMS resonant biaxial accelerometer (16) is provided with: an inertial mass (2; 2'), anchored to a substrate (30) by means of elastic elements (8) in such a way as to be suspended above the substrate (30), the elastic elements (8) enabling inertial movements of detection of the inertial mass (2; 2') along a first axis of detection (x) and a second axis of detection (y) that belong to a plane (xy) of main extension of said inertial mass (2; 2'), in response to respective linear external accelerations (a x , a y ); and at least one first resonant element (10a) and one second resonant element (10b), which have a respective longitudinal extension, respectively along the first axis of detection (x) and the second axis of detection (y), and are mechanically coupled to the inertial mass (2; 2') through a respective one of the elastic elements (8) in such a way as to undergo a respective axial stress (N 1 , N 2 ) when the inertial mass moves respectively along the first axis of detection (x) and the second axis of detection (y).

Abstract translation: 用于MEMS共振双轴加速度计（16）的微机电检测结构（1; 1'）设置有：惯性块（2; 2'），其通过弹性元件（8）锚固到基底（30） 一种悬挂在基板（30）上方的方式，弹性元件（8）使惯性质量（2; 2'）沿着第一检测轴（x）和第二检测轴线 y），其响应于相应的线性外部加速度（ax，ay）属于所述惯性质量（2; 2'）的主延伸的平面（xy）; 以及至少一个第一谐振元件（10a）和一个第二谐振元件（10b），它们分别具有沿着第一检测轴（x）和第二检测轴（y）的相应的纵向延伸，并且机械耦合 通过所述弹性元件（8）中的相应弹性元件（8）的惯性质量块（2; 2'）以当所述惯性质量分别沿着所述第一检测轴线移动时经受相应的轴向应力（N1，N2） x）和第二检测轴（y）。

公开(公告)号：WO2012020290A3

公开(公告)日：2012-02-16

申请号：PCT/IB2011/001724

申请日：2011-07-26

Applicant: STMICROELECTRONICS S.R.L. ,  SAGGIO, Mario, Giuseppe ,  MURABITO, Domenico ,  FIORE, Letterio ,  MORALE, Giuseppe ,  ARENA, Giuseppe

Inventor： SAGGIO, Mario, Giuseppe ,  MURABITO, Domenico ,  FIORE, Letterio ,  MORALE, Giuseppe ,  ARENA, Giuseppe

IPC: H01L21/20 ,  H01L29/739 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: A process for manufacturing a semiconductor device (10; 10') envisages the steps of: providing a semiconductor material body (2) having at least one deep trench (4) that extends through said body of semiconductor material starting from a top surface (2a) thereof; and filling the deep trench (4) via an epitaxial growth of semiconductor material, thereby forming a columnar structure (8) within the body of semiconductor material (2). The manufacturing process further envisages the step of modulating the epitaxial growth by means of a concurrent chemical etching of the semiconductor material that is undergoing epitaxial growth so as to obtain a compact filling free from voids of the deep trench (4); in particular, a flow of etching gas is introduced into the same reaction environment as that of the epitaxial growth, wherein a flow of source gas is supplied for the same epitaxial growth.

公开(公告)号：WO2011135065A1

公开(公告)日：2011-11-03

申请号：PCT/EP2011/056817

申请日：2011-04-29

Applicant: STMicroelectronics S.r.l. ,  ABBONDANZA, Giuseppe

Inventor： ABBONDANZA, Giuseppe

IPC: H01L21/205 ,  H01L21/02

CPC classification number: H01L21/02529 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02598 ,  H01L21/02658 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267

Abstract: A method for manufacturing a semiconductor wafer (112) is provided. The method comprises providing a monocrystalline silicon wafer (102), epitaxially growing a first layer (108) of a first material on the silicon wafer (102), and epitaxially growing a second layer (110) of a second material on the first layer. Said first material is monocrystalline silicon carbide, and said second material is monocrystalline silicon.

Abstract translation: 提供一种制造半导体晶片（112）的方法。 该方法包括提供单晶硅晶片（102），在硅晶片（102）上外延生长第一材料的第一层（108），以及在第一层上外延生长第二材料的第二层（110）。 所述第一材料是单晶碳化硅，所述第二材料是单晶硅。

公开(公告)号：WO2011079881A1

公开(公告)日：2011-07-07

申请号：PCT/EP2010/005930

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ROSSI, Sandro ,  GHISU, Davide Ugo ,  RICCIARDO, Antonio

Inventor： ROSSI, Sandro ,  GHISU, Davide Ugo ,  RICCIARDO, Antonio

IPC: H03K17/06 ,  H03K17/687 ,  H03K17/74 ,  B06B1/02

CPC classification number: H03K17/6872 ,  B06B1/0215 ,  H03K17/06 ,  H03K17/74

Abstract: A clamping circuit (10) to a voltage reference (GND) is described, of the type comprising at least one clamping core (11) connected to an output terminal (HVout) and having a central node (XC) connected to the voltage reference (GND) and in turn including at least one first and one second clamp transistor (MC1; MC2), connected to the central node (XC) and having respective control terminals (XG1, XG2), the clamping core (11) being also connected at the input to a low voltage input driver block (13). Advantageously according to the invention, the clamping core (11) further comprises at least one first switching off transistor (MS1) connected to the output terminal (HVout) and to the first clamp transistor (MC1), as well as a second switching off transistor (MS2) connected to the output terminal (HVout) and to the second clamp transistor (MC2), these first and second clamp transistors (MC1, MC2) being high voltage MOS transistors of complementary type and these first and second switching off transistors (MS1, MS2) being high voltage MOS transistors of complementary type and connected to the first and second clamp transistors (MC1, MC2) by having the respective equivalent or body diodes in anti-series so as to close themselves when the clamping circuit (10) is active and to sustain positive and negative high voltages when the clamping circuit (10) is not active.

Abstract translation: 描述了到电压基准（GND）的钳位电路（10），其类型包括连接到输出端子（HVout）的至少一个夹紧芯部（11），并且具有连接到电压基准的中心节点（XC） GND），并且还包括连接到中心节点（XC）并且具有各自的控制端子（XG1，XG2）的至少一个第一和第二钳位晶体管（MC1; MC2），夹紧芯部（11）也连接在 输入到低电压输入驱动器块（13）。 有利地，根据本发明，夹紧芯（11）还包括连接到输出端（HVout）和第一钳位晶体管（MC1）的至少一个第一截止晶体管（MS1）以及第二截止晶体管 （MC2）连接到输出端子（HVout）和第二钳位晶体管（MC2）的这些第一和第二钳位晶体管（MC1，MC2）是互补型高压MOS晶体管，这些第一和第二截止晶体管 ，MS2）是互补型的高电压MOS晶体管，通过使相应的等效或体二极管反串联以便在钳位电路（10）为 当钳位电路（10）未被激活时，它有效并维持正和负的高电压。

公开(公告)号：WO2011063873A1

公开(公告)日：2011-06-03

申请号：PCT/EP2010/005928

申请日：2010-09-29

Applicant: STMICROELECTRONICS S.R.L. ,  ALBERTINI, Matteo ,  RONCHI, Daniele ,  ROSSI, Sandro ,  RICOTTI, Giulio

Inventor： ALBERTINI, Matteo ,  RONCHI, Daniele ,  ROSSI, Sandro ,  RICOTTI, Giulio

IPC: H03F3/45 ,  H03G1/00

CPC classification number: H03F3/45183 ,  H03F3/45098 ,  H03F2200/294 ,  H03F2200/453 ,  H03F2203/45492 ,  H03F2203/45674

Abstract: The invention relates to a driving method for obtaining a linear gain variation of a transconductance amplifier, of the type comprising at least one differential transistor cell, with adjustment of a driving voltage value (Vtgc1) of a degenerative driving transistor (MD1) of said transconductance amplifier, comprising the steps of : generating an output current signal of a differential cell (11) being a copy of said differential transistor cell of said transconductance amplifier, said output current signal having a linear relationship with a transconductance value of said copy differential cell (11) as said driving voltage (Vtgc1) varies; generating a reference current signal having a linear relationship with a differential input voltage; comparing said output current signal and said reference current signal for adjusting said driving voltage value (Vtgc1) and modifying said transconductance value of said copy differential cell (11) up to a balance of said current signals.

Abstract translation: 本发明涉及一种用于获得包括至少一个差分晶体管单元的类型的跨导放大器的线性增益变化的驱动方法，其中调节所述跨导的退化驱动晶体管（MD1）的驱动电压值（Vtgc1） 放大器，包括以下步骤：产生作为所述跨导放大器的所述差分晶体管单元的副本的差分单元（11）的输出电流信号，所述输出电流信号与所述复制差分单元的跨导值具有线性关系（ 11），因为所述驱动电压（Vtgc1）变化; 产生与差分输入电压具有线性关系的参考电流信号; 比较所述输出电流信号和所述参考电流信号，用于调节所述驱动电压值（Vtgc1），并修改所述复制差分单元（11）的所述跨导值直到所述电流信号的平衡。

公开(公告)号：WO2011061771A1

公开(公告)日：2011-05-26

申请号：PCT/IT2009/000527

申请日：2009-11-20

Applicant: UNIMICRON TECHNOLOGY CORP. ,  STMICROELECTRONICS S.R.L. ,  CORTESE, Mario, Francesco ,  AZZOPARDI, Mark, A. ,  HSU, Shih-Ping ,  TSAI, Kun-Chen ,  MICALLEF, Ivan

Inventor： CORTESE, Mario, Francesco ,  AZZOPARDI, Mark, A. ,  HSU, Shih-Ping ,  TSAI, Kun-Chen ,  MICALLEF, Ivan

IPC: B81B7/00

CPC classification number: B81B7/0064 ,  B81B2201/0257 ,  B81C2203/0118 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/3025 ,  H04R19/005 ,  Y10T156/1056 ,  Y10T428/24562 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A lid for a MEMS device and the relative manufacturing method. The lid includes: a first board (20) with opposite first and second surfaces (20a, 20b) having first and second metal layers (21a, 21b) disposed thereon, respectively, wherein a through cavity (200) extends through the first board and the first and second metal layers; a second board (23) with opposite third and fourth surfaces (23a, 23b); an adhesive layer (22) sandwiched between the second surface of the first board and the third surface of the second board to couple the first and second boards together such that the through cavity is closed by the second board, thereby forming a recess (200); and a first conductor layer (25a) coating the bottom and the side surfaces (201a, 201b) of the recess. The lid enhances the shielding effect upon the MEMS device.

Abstract translation: MEMS器件的盖子及相关制造方法。 所述盖包括：分别具有相对的第一和第二表面（20a，20b）的第一板（20），其具有分别设置在其上的第一和第二金属层（21a，21b），其中通孔（200）延伸穿过所述第一板和 第一和第二金属层; 具有相对的第三和第四表面（23a，23b）的第二板（23）; 夹在所述第一板的第二表面和所述第二板的第三表面之间的粘合剂层（22），以将所述第一和第二板连接在一起，使得所述通孔由所述第二板封闭，从而形成凹部（200） ; 以及涂覆凹部的底部和侧面（201a，201b）的第一导体层（25a）。 盖子增强了对MEMS器件的屏蔽效果。

公开(公告)号：WO2011047861A1

公开(公告)日：2011-04-28

申请号：PCT/EP2010/006435

申请日：2010-10-21

Applicant: STMICROELECTRONICS S.r.l. ,  CREMONESI, Giovanni ,  BARDELLI, Roberto Giorgio ,  FORNERA, Silvio

Inventor： CREMONESI, Giovanni ,  BARDELLI, Roberto Giorgio ,  FORNERA, Silvio

IPC: H03K3/03 ,  H03K23/54

CPC classification number: H03K3/0315 ,  H03K23/542

Abstract: Ring oscillator comprising a plurality of elementary units (5) connected in cascade and linked in order to make a chain with the respective output terminals (OUT) connected to the input terminals (IN) of the successive elementary units (5) of the chain, the elementary units (5) being crossed by a cyclic signal (CLK) during a time period (Δt) of activation, each of said elementary units (5) comprising an auxiliary recovery terminal (15) for temporarily resetting each elementary unit (5) during each loop of said cyclic signal (CLK), said auxiliary recovery terminal (15) being connected to an output terminal (OUT) of a successive elementary unit (5) of the chain.

Abstract translation: 环形振荡器包括级联连接并连接的多个基本单元（5），以便形成与链的连续基本单元（5）的输入端（IN）连接的相应输出端（OUT）的链， 基本单元（5）在激活的时间段（Δt）期间被循环信号（CLK）越过，每个所述基本单元（5）包括用于临时复位每个基本单元（5）的辅助恢复终端（15） ）在所述循环信号（CLK）的每个循环期间，所述辅助恢复终端（15）连接到链的连续基本单元（5）的输出端（OUT）。